Abstract
A built-in single event upsets (SEUs) detector is presented in this paper. This detector utilizes charge sharing to detect an SEU in a sequential cell, and the detection process is analyzed through Accuro simulations in a 65 nm technology. The normal operation of this detector would not induce obvious performance degradation of the target circuit. Through using this detector, error correction can be achieved based on dual modular redundancy (DMR) while the related power is about 20.4 % lower than that induced by triple modular redundancy (TMR).
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The authors appreciate the support from Natural Sciences and Engineering Research Council of Canada (NSERC), CMC Microsystems, Robust Chip Inc, and iROC Technologies.
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Li, Y., Wang, H., Li, L. et al. A Built-in Single Event Upsets Detector for Sequential Cells. J Electron Test 32, 11–20 (2016). https://doi.org/10.1007/s10836-015-5560-2
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DOI: https://doi.org/10.1007/s10836-015-5560-2