Abstract
This paper proposes a power integrity control technique for dynamically controlling power supply voltage fluctuations for a device under test (DUT), and demonstrates its effectiveness for eliminating the overkills/underkills due to the difference of power supply impedance between an automatic test equipment (ATE) and a practical operating environment of the DUT. The proposed method injects compensation currents into the power supply nodes on the ATE system in a feed-forward manner such that the ATE power supply waveform matches with the one on the customer’s operating environment of the DUT. A method for calculating the compensation current is also described. Experimental results show that the proposed method can emulate the power supply voltage waveform under a customer’s operating condition and eliminate 95 % of overkills/underkills in the maximum operating frequency testing with 105 real silicon devices. Limitations and applications of the proposed method are also discussed.
References
A’ain AKB, Bratt AH, Dorey AP (1995) On the development of power supply voltage control testing technique for analogue circuits. Proc. IEEE 4th Asian Test Symposium, pp. 133–139
A’ain AKB, Bratt AH, Dorey AP (1996) Testing analogue circuits by AC power supply voltage. Proc. IEEE 9th International Conference on VLSI Design, pp. 238–241
Arabi K (2010) Power noise and its impact of production test and validation of SoC devices. Proc. 28th IEEE VLSI Test Symposium, pp. 285–286
Basharapandiyan S, Cai Y (2010) Practical active compensation techniques for ATE power supply response for testing of mixed signal data storage SOCs. Proc. IEEE International Test Conference, pp. 1–7
Hao H, McCluskey E (1993) Very-low-voltage testing for weak CMOS logic ICs. Proc. IEEE International Test Conference, pp. 275–284
Huh S, Swaminathan M, Keezer D (2011) Low-noise power delivery network design using power transmission line for mixed-signal testing. Proc. IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop, pp. 53–57
Intel (2009) Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.1 Design Guidelines
Ishida M, Kusaka T, Nakura T, Komatsu S, Asada K (2014) Statistical silicon results of dynamic power integrity control of ATE for eliminating overkills and underkills. Proc. IEEE International Test Conference, pp. 1–10
Ishida M, Nakura T, Kikkawa T, Kusaka T, Komatsu S, Asada K (2012) Power integrity control of ATE for emulating power supply fluctuations on customer environment. Proc. IEEE International Test Conference, pp. 1–10
Johnson GH (2000) Challenges of high supply currents during VLSI test. Proc. IEEE International Test Conference, pp. 1013–1020
Mallet J-P (2002) High current DPS architecture for sort test challenge. Proc. IEEE International Test Conference, pp. 913–922
Okumura T, Minami F, Shimazaki K, Kuwada K, Hashimoto M (2010) Gate delay estimation in STA under dynamic power supply noise. Proc. 15th Asia and South Pacific Design Automation Conference, pp. 775–780
Wang J, Walker DM, Lu X, Majhi A, Kruseman B, Gronthoud G, Villagra LE, van de Wiel P, Eichenberger S (2007) Modeling power supply noise in delay testing. IEEE Des Test Comput 24(3):226–234
Wang J, Walker DMH, Majhi A, Kruseman B, Gronthoud G, Villagra LE, van de Wiel P, Eichenberger S (2006) Power supply noise in delay testing. Proc. IEEE International Test Conference, pp. 1–10
Yoon C, Park H, Lee W, Shin M, Pak JS, Kim J (2008) Power/Ground noise immunity test in wireless and high-speed UWB communication system. Proc. IEEE International Symposium on Electromagnetic Compatibility, pp. 1–6
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Ishida, M., Nakura, T., Kusaka, T. et al. Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills in Device Testing. J Electron Test 32, 257–271 (2016). https://doi.org/10.1007/s10836-016-5582-4
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DOI: https://doi.org/10.1007/s10836-016-5582-4