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Evaluating the Effectiveness of D-chains in SAT-based ATPG and Diagnostic TPG

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Abstract

The ever increasing size and complexity of today’s Very-Large-Scale-Integration (VLSI) designs requires a thorough investigation of new approaches for the generation of test patterns for both test and diagnosis of faults. SAT-based automatic test pattern generation (ATPG) is one of the most popular methods, where, in contrast to classical structural ATPG methods, first a mathematical representation of the problem in form of a Boolean formula is generated, which is then evaluated by a specialized solver. If the considered fault is testable, the solver will return a satisfying assignment, from which a test pattern can be extracted; otherwise no such assignment can exist. In order to speed up test pattern generation, the concept of D-chains was introduced by several researchers. Thereby supplementary clauses are added to the Boolean formula, reducing the search space and guiding the solver toward the solution. In the past, different variants of D-chains have been developed, such as the backward D-chain or the indirect D-chain. In this work we perform a thorough analysis and evaluation of the D-chain variants for test pattern generation and also analyze the impact of different D-chain encodings on diagnostic test pattern generation. Our experimental results show that depending on the incorporated D-chain the runtime can be reduced tremendously.

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References

  1. Boros E, Hammer PL (2002) Pseudo-Boolean optimization. Discret Appl Math 123(1-3):155. https://doi.org/10.1016/S0166-218X(01)00341-9

    Article  MathSciNet  MATH  Google Scholar 

  2. Burchard J, Neubauer F, Raiola P, Erb D, Becker B (2017) Evaluating the effectiveness of D-chains in SAT-based ATPG. In: Proceedings 18th IEEE Latin American Test Symposium, pp 1–6

  3. Cheng KT (1993) Transition fault testing for sequential circuits. IEEE Trans Comput Aided Des Integr Circuits Syst 12(12):1971

    Article  Google Scholar 

  4. Chen H, Marques-Silva J (2009) TG-PRO: a new model for SAT-based ATPG. In: Proceedings of the IEEE International High Level Design Validation and Test Workshop, pp 76–81

  5. Chen H, Marques-Silva J (2013) A two-variable model for SAT-based ATPG. IEEE Trans Comput Aided Des Integr Circuits Syst 32(12):1943

    Article  Google Scholar 

  6. Corno F, Reorda MS, Squillero G (2000) RT-level ITC’99 benchmarks and first ATPG results. IEEE Des Test 17(3):44. https://doi.org/10.1109/54.867894

    Article  Google Scholar 

  7. Drechsler R, Eggergluss S, Fey G, Glowatz A, Hapke F, Schloeffel J, Tille D (2008) On acceleration of SAT-based ATPG for industrial designs. IEEE Trans Comput Aided Des Integr Circuits Syst 27 (7):1329

    Article  Google Scholar 

  8. Eén N, Sörensson N (2004) An extensible SAT-solver. In: Proceedings Theory and Applications of Satisfiability Testing (SAT)

  9. Eggersglüß S, Drechsler R (2011) As-Robust-As-Possible test generation in the presence of small delay defects using pseudo-Boolean optimization. In: Proceedings of the Design, Automation Test in Europe, pp 1–6

  10. Eggersglüß S, Krenz-Bååth R, Glowatz A, Hapke F, Drechsler R (2012) A new SAT-based ATPG for generating highly compacted test sets. In: IEEE DDECS, pp 230–235

  11. Erb D, Scheibler K, Sauer M, Becker B (2014) Efficient SMT-based ATPG for interconnect open defects. In: Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE), pp 1–6

  12. Erb D, Scheibler K, Kochte MA, Sauer M, Wunderlich HJ, Becker B (2014) Test pattern generation in presence of unknown values based on restricted symbolic logic. In: Proceedings of the International Test Conference

  13. Erb D, Scheibler K, Kochte MA, Sauer M, Wunderlich HJ, Becker B (2016) Mixed 01X-RSL-Encoding for fast and accurate ATPG with unknowns. In: Proceedings of the Asia and South Pacific Design Automation Conference, pp 749–754

  14. Fey G, Shi J, Drechsler R (2006) Efficiency of multi-valued encoding in SAT-based ATPG. In: Proceedings of the 36th International Symposium on Multiple-Valued Logic (ISMVL’06), pp 25– 25

  15. Fujiwara H, Shimono T (1983) On the acceleration of test generation algorithms. IEEE Trans Comput c-32(12):1137–1144

    Article  Google Scholar 

  16. Galey JM, Norby RE, Roth JP (1961) Techniques for the diagnosis of switching circuit failures. In: Proceedings of the 2nd Annual Symposium on Switching Circuit Theory and Logical Design (SWCT 1961), pp 152–160

  17. Gay M, Burchard J, Horacek J, Ekossono ASM, Schubert T, Becker B, Polian I, Kreuzer M, Small scale AES (2016) Toolbox: algebraic and propositional formulas, circuit-implementations and fault equations. In: Proceedings of the FCTRU

  18. Goel P (1981) An implicit enumeration algorithm to generate tests for combinational logic circuits. IEEE Trans Comput C-30(3): 215

    Article  MATH  Google Scholar 

  19. Hsieh ER, Rasmussen RA, Vidunas LJ, Davis WT Delay test generation. In: Proceedings of the 14th Design Automation Conference (IEEE Press, 1977), DAC ’77, pp 486–491

  20. Larrabee T (1992) Test pattern generation using Boolean satisfiability. IEEE Trans Comput Aided Des 11 (1):4–15

    Article  Google Scholar 

  21. Raiola P, Erb D, Reddy SM, Becker B (2017) Accurate diagnosis of interconnect open defects based on the robust enhanced aggressor victim model. In: Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, pp 135–140

  22. Roth JP (1966) Diagnosis of automata failures: a calculus and a method. IBM J Res Dev 10(4):278

    Article  MathSciNet  MATH  Google Scholar 

  23. Rudnick EM, Fuchs WK, Patel JH (1992) Diagnostic fault simulation of sequential circuits. In: Proceedings IEEE International Test Conference, pp 178–186

  24. Sauer M, Czutro A, Polian I, Becker B (2012) Small-delay-fault ATPG with waveform accuracy. In: Proceedings of the Int’l Conference on CAD, pp 30–36

  25. Sauer M, Becker B, Polian I (2016) PHAETON: a SAT-based framework for timing-aware path sensitization. IEEE Trans Comput 65(6):1869

    Article  MathSciNet  MATH  Google Scholar 

  26. Savir J, Patil S (1994) Broadside delay test. IEEE Trans Comput Aided Des Integr Circuits Syst 13(8):1057

    Article  Google Scholar 

  27. Scheibler K, Erb D, Becker B (2016) Accurate CEGAR-based ATPG in presence of unknown values for large industrial designs. In: Proceedings of the Design, Automation Test in Europe Conference Exhibition (DATE)

  28. Schubert T, Reimer S (2016) antom, in https://projects.informatik.uni-freiburg.de/projects/antom

  29. Shi J, Fey G, Drechsler R, Glowatz A, Schloffel J, Hapke F (2005) Experimental studies on SAT-based test pattern generation for industrial circuits. In: Proceedings of the 6th International Conference on ASIC, vol 2

  30. Soos M, Nohl K, Castelluccia C (2009) Extending SAT solvers to cryptographic problems. In: Proceedings of the Theory and Applications of Satisfiability Testing, pp 244–257

  31. Stephan P, Brayton RK, Sangiovanni-Vincentelli AL (1996) Combinational test generation using satisfiability. IEEE Trans Comput Aided Des Integr Circ Syst 15(9):1167–1176

    Article  Google Scholar 

  32. Tafertshofer P, Ganz A (1999) SAT based ATPG using fast justification and propagation in the implication graph. In: Proceedings IEEE/ACM International Conference on Computer-Aided Design, pp 139–146

  33. Tille D, Drechsler R (2008) Incremental SAT Instance generation for SAT-based ATPG. In: Proceedings of the 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, pp 1–6

  34. Tille D, Eggersglüß S, Drechsler R (2010) Incremental solving techniques for SAT-based ATPG. IEEE Trans Comput Aided Des Integr Circ Syst 29(7):1125

    Article  Google Scholar 

  35. Tseitin G (1968) On the complexity of derivation in propositional calculus studies in constructive mathematics and mathematical logic

  36. Si2. NanGate FreePDK45 generic open cell library, v1.3. http://www.si2.org/openeda.si2.org/projects/nangatelib

  37. Yang K, Cheng KT, Wang LC (2004) Trangen: a SAT-based ATPG for path-oriented transition faults. In: Proceedings of the ASP-DAC: Asia and South Pacific Design Automation Conference, pp 92–97

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Authors and Affiliations

  1. Computer Architecture, University of Freiburg, Freiburg (Breisgau), Germany

    Pascal Raiola, Jan Burchard, Felix Neubauer & Bernd Becker

  2. Infineon Technologies AG, Neubiberg, Germany

    Dominik Erb

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  1. Pascal Raiola
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  2. Jan Burchard
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  3. Felix Neubauer
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  4. Dominik Erb
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  5. Bernd Becker
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Correspondence to Pascal Raiola.

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Responsible Editor: L. M. Bolzani Pöhls

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Raiola, P., Burchard, J., Neubauer, F. et al. Evaluating the Effectiveness of D-chains in SAT-based ATPG and Diagnostic TPG. J Electron Test 33, 751–767 (2017). https://doi.org/10.1007/s10836-017-5693-6

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  • DOI: https://doi.org/10.1007/s10836-017-5693-6

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