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Thermal-aware SoC Test Scheduling with Voltage/Frequency Scaling and Test Partition

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Abstract

With increasing power density in modern integrated circuits, thermal issues are becoming a critical problem in System-on-a-Chip (SoC) testing. In this paper, we develop the thermal-aware test scheduling methods using Voltage/Frequency Scaling (VFS) and Test Partition (TP) to reduce the expensive Test Application Time (TAT). First, we develop a quick temperature estimation method in test scheduling to ensure the test temperature within the given range. Second, we propose a thermal-aware test scheduling method based on the mixed-integer linear programming model (MILP) (called STP-M) that applies VFS and TP to search the optimum scheduling and further reduce the TAT. Third, we develop a heuristic method based on Rectangular Strip Packing (called H-RSP) to quickly access the quasi-optimal scheduling. The experimental results on ITC’02 benchmarks showed that the STP-M obtains the most optimized result for every benchmark and saved 15.5% and 8.0% TAT on average compared with the existing works, while H-RSP takes less than 10 seconds to access the quasi-optimal scheduling that is close to that of STP-M.

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Acknowledgments

This paper is supported in part by National Natural Science Foundation of China (NSFC) under grant No. (61432017, 61502422, 61404092), in part by the Fundamental Research Funds for the Central Universities, and in part by Zhejiang Provincial Natural Science Foundation under grant No. (LY18F020028).

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Authors and Affiliations

  1. School of Software Engineering, Tongji University, Shanghai, China

    Ying Zhang, Li Ling & Jianhui Jiang

  2. College of Computer Science and Technology, Zhejiang University of Technology, Hangzhou, China

    Jie Xiao

Authors
  1. Ying Zhang
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  2. Li Ling
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  3. Jianhui Jiang
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  4. Jie Xiao
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Correspondence to Jianhui Jiang.

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Responsible Editor: K. K. Saluja

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Zhang, Y., Ling, L., Jiang, J. et al. Thermal-aware SoC Test Scheduling with Voltage/Frequency Scaling and Test Partition. J Electron Test 34, 447–460 (2018). https://doi.org/10.1007/s10836-018-5733-x

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  • DOI: https://doi.org/10.1007/s10836-018-5733-x

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