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Timed Modal Logics for Real-Time Systems

Specification, Verification and Control

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Abstract

In this paper, a timed modal logic L c is presented for the specification and verification of real-time systems. Several important results for L c are discussed. First we address the model checking problem and we show that it is an EXPTIME-complete problem. Secondly we consider expressiveness and we explain how to express strong timed bisimilarity and how to build characteristic formulas for timed automata. We also propose a compositional algorithm for L c model checking. Finally we consider several control problems for which L c can be used to check controllability.

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Authors and Affiliations

  1. Lab. Spécification & Vérification, ENS de Cachan & CNRS UMR 8643, Paris, France

    Patricia Bouyer

  2. National ICT Australia and CNRS, The University of New South Wales, Sydney, NSW, Australia

    Franck Cassez

  3. LIAFA, Institut Universitaire de France, Université Paris Diderot & CNRS UMR 7089, Paris, France

    François Laroussinie

Authors
  1. Patricia Bouyer
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  2. Franck Cassez
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  3. François Laroussinie
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Corresponding author

Correspondence to François Laroussinie.

Additional information

All the authors are Partly supported by ANR project DOTS and project QUASIMODO (FP7-ICT).

Franck Cassez is supported by a Marie Curie International Outgoing Fellowship within the 7th European Community Framework Programme.

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Bouyer, P., Cassez, F. & Laroussinie, F. Timed Modal Logics for Real-Time Systems. J of Log Lang and Inf 20, 169–203 (2011). https://doi.org/10.1007/s10849-010-9127-4

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  • DOI: https://doi.org/10.1007/s10849-010-9127-4

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