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High Speed Receiver for Capsule Endoscope

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Abstract

In this study, a high-speed receiver for a capsule endoscope was proposed and implemented. The proposed receiver could receive 20 Mbps data that was sufficient to receive images with a higher resolution than conventional receivers. The receiver used a 1.2 GHz band to receive radio frequency (RF) signal, and demodulated the signal to an intermediate frequency (IF) stage (150 MHz). The demodulated signal was amplified, filtered, and under-sampled by a high-speed analog-to-digital converter (ADC). In order to decode the under-sampled data in real time, a simple frequency detection algorithm was selected and was implemented by using a FPGA. The implemented system could receive 20 Mbps data.

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Abbreviations

ADC:

Analog-to-digital converter

BER:

Bit error rate

CPLD:

Complex programmable logic device

DT:

Data transmission

FM:

Frequency modulation

FPGA:

Field-programmable gate array

IF:

Intermediate frequency

RF:

Radio frequency

SNR:

Signal to noise ratio

VCO:

Voltage controlled oscillator

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Acknowledgement

This work was supported by grand No. 10031779 from the Strategic Technology Development Program of Ministry of Knowledge Economy.

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Correspondence to J. H. Cho.

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Woo, S.H., Yoon, K.W., Moon, Y.K. et al. High Speed Receiver for Capsule Endoscope. J Med Syst 34, 843–847 (2010). https://doi.org/10.1007/s10916-009-9298-1

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  • DOI: https://doi.org/10.1007/s10916-009-9298-1

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