Abstract
Filter banks are the major signal processing blocks that dissipate large amount of power in a portable digital hearing aid device. The power consumption can be reduced by replacing the power-hungry multipliers of the filter by power efficient approximate multipliers. This paper illustrates the application of an approximate multiplier for error tolerant hearing aid application. Frequency response masking approach is used for the development of a 10-band non-uniform approximate FIR filter bank with a minimum stop band attenuation of greater than 50 dB. Audiogram matching is done with audiograms of different types of moderate hearing loss and the matching error is computed. Simulation results show that the audiogram matching error falls within +/− 5 dB range.
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References
Baugh, C. R., & Wooley, B. A. (1973). A two’s complement parallel array multiplication algorithm. IEEE Transactions on Computers, 100(12), 1045–1047
Bornholt, J., Mytkowicz, T., & McKinley, K. S. (2015). Uncertaint: Abstractions for uncertain hardware and software. IEEE Micro, 35(3), 132–143
Chippa, V. K., Mohapatra, D., Raghunathan, A., Roy, K., & Chakradhar, S. T. (2010). Scalable effort hardware design: Exploiting algorithmic resilience for energy efficiency. In Design automation conference (pp. 555–560). IEEE.
Deng, T. B. (2010). Three-channel variable filter-bank for digital hearing aids. IET Signal Processing, 4(2), 181–196
Garofalo, V., Petra, N., De Caro, D., Strollo, A. G., & Napoli, E. (2008). Low error truncated multipliers for DSP applications. In 2008 15th IEEE international conference on electronics, circuits and systems (pp. 29–32). IEEE.
Gupta, V., Mohapatra, D., Raghunathan, A., & Roy, K. (2012). Low-power digital signal processing using approximate adders. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 32(1), 124–137
Gustafsson, O., Johansson, H., and Wanhammar, L. (2000). Design and efficient implementation of narrow-band single filter frequency masking FIR filters. In 2000 10th European signal processing conference (pp. 1–4). IEEE.
Gustafsson, O., Johansson, H., & Wanhammar, L. (2001). Narrow-band and wide-band single filter frequency masking FIR filters. In ISCAS 2001. The 2001 IEEE international symposium on circuits and systems (Cat. No. 01CH37196) (Vol. 2, pp. 181–184). IEEE.
Haridas, N., & Elias, E. (2016). Efficient variable bandwidth filters for digital hearing aid using Farrow structure. Journal of Advanced Research., 7(2), 255–262
Hashemi, S., Bahar, R. I., & Reda, S. (2015). DRUM: A dynamic range unbiased multiplier for approximate applications. In 2015 IEEE/ACM international conference on computer-aided design (ICCAD) (pp. 418–425). IEEE.
Jiang, H., Han, J., Qiao, F., & Lombardi, F. (2015). Approximate radix-8 booth multipliers for low-power and high-performance operation. IEEE Transactions on Computers, 65(8), 2638–2644
Jiang, H., Liu, C., Liu, L., Lombardi, F., & Han, J. (2017). A review, classification, and comparative evaluation of approximate arithmetic circuits. ACM Journal on Emerging Technologies in Computing Systems (JETC), 13(4), 1–34
Jiang, H., Santiago, F. J., Ansari, M. S., Liu, L., Cockburn, B. F., Lombardi, F., & Han, J. (2019). Characterizing approximate adders and multipliers optimized under different design constraints. In Proceedings of the 2019 on great lakes symposium on VLSI (pp. 393–398).
Jouppi, N. P., Young, C., Patil, N., Patterson, D., Agrawal, G., Bajwa, R., Bates, S., Bhatia, S., Boden, N., Borchers, A., & Boyle, R. (2017). In-datacenter performance analysis of a tensor processing unit. In Proceedings of the 44th annual international symposium on computer architecture (pp. 1–12).
Kulkarni, P., Gupta, P., & Ercegovac, M. (2011). Trading accuracy for power with an underdesigned multiplier architecture. In 2011 24th international conference on VLSI design (pp. 346–351). IEEE.
Leon, V., Zervakis, G., Soudris, D., & Pekmestzi, K. (2017). Approximate hybrid high radix encoding for energy-efficient inexact multipliers. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 26(3), 421–430
Lian, Y., & Wei, Y. (2005). A computationally efficient nonuniform FIR digital filter bank for hearing aids. IEEE Transactions on Circuits and Systems i: Regular Papers, 52(12), 2754–2762
Lim, Y. (1986). Frequency-response masking approach for the synthesis of sharp linear phase digital filters. IEEE Transactions on Circuits and Systems, 33(4), 357–364
Lim, Y. C., & Lian, Y. (1993). The optimum design of one-and two-dimensional FIR filters using the frequency response masking technique. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 40(2), 88–95
Liu, W., Lombardi, F., & Shulte, M. (2020). A retrospective and prospective view of approximate computing [point of view]. Proceedings of the IEEE, 108(3), 394–399
Liu, W., Qian, L., Wang, C., Jiang, H., Han, J., & Lombardi, F. (2017). Design of approximate radix-4 booth multipliers for error-tolerant computing. IEEE Transactions on Computers, 66(8), 1435–1441
Lyons, R. G. (2011). Understanding digital signal processing. (3rd ed.). Pearson Education.
Ma, T., Shen, C., & Wei, Y. (2019). Adjustable filter bank design for hearing aids system. In 2019 IEEE international symposium on circuits and systems (ISCAS) (pp. 1–5). IEEE.
Mishra, A. K., Barik, R., & Paul, S. (2014). iACT: A software-hardware framework for understanding the scope of approximate computing. In Workshop on approximate computing across the system stack (WACAS) (p. 52).
Mittal, S. (2016). A survey of techniques for approximate computing. ACM Computing Surveys (CSUR), 48(4), 62
Momeni, A., Han, J., Montuschi, P., & Lombardi, F. (2014). Design and analysis of approximate compressors for multiplication. IEEE Transactions on Computers, 64(4), 984–994
Nair, R. (2015). Big data needs approximate computing: Technical perspective. Communications of the ACM, 58(1), 104–104
Narayanamoorthy, S., Moghaddam, H. A., Liu, Z., Park, T., & Kim, N. S. (2014). Energy-efficient approximate multiplication for digital signal processing and classification applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 23(6), 1180–1184
Petra, N., De Caro, D., Garofalo, V., Napoli, E., & Strollo, A. G. (2009). Truncated binary multipliers with variable correction and minimum mean square error. IEEE Transactions on Circuits and Systems i: Regular Papers, 57(6), 1312–1325
Ramya, R., & Moorthi, S. (2019). Performance evaluation of wordlength reduction based area and power efficient approximate multiplier for mobile multimedia applications. Circuits, Systems, and Signal Processing, Springer, 38(12), 5699–5716
Saramaki, T. (1987). Design of FIR filters as a tapped cascaded interconnection of identical subfilters. IEEE Transactions on Circuits and Systems, 34(9), 1011–1029
Saramaki, T., & Mitra, S. K. (1993). Finite impulse response filter design, handbook for digital signal processing. Wiley-Interscience.
Sebastian, A., & James, T. G. (2015). Digital filter bank for hearing aid application using FRM technique. In 2015 IEEE international conference on signal processing, informatics, communication and energy systems (SPICES) (pp. 1–5). IEEE.
Sengupta, D., & Saleh, R. (2007). Generalized power-delay metrics in deep submicron CMOS designs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 26(1), 183–189
Stine, J. E., & Duverne, O. M. (2003). Variations on truncated multiplication. In Proceedings Euromicro symposium on digital system design, 2003 (pp. 112–119). IEEE.
Venkatachalam, S., & Ko, S. B. (2017). Design of power and area efficient approximate multipliers. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25(5), 1782–1786
Wei, Y., & Lian, Y. (2006). A 16-band nonuniform FIR digital filterbank for hearing aid. In Proceedings of the 2006 IEEE biomedical circuits and systems conference (pp. 186–189). IEEE.
Wei, Y., Ma, T., Ho, B. K., & Lian, Y. (2018). The design of low-power 16-band nonuniform filter bank for hearing aids. IEEE Transactions on Biomedical Circuits and Systems, 13(1), 112–123
Zendegani, R., Kamal, M., Bahadori, M., Afzali-Kusha, A., & Pedram, M. (2016). RoBA multiplier: A rounding-based approximate multiplier for high-speed yet energy-efficient digital signal processing. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25(2), 393–401
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Ramya, R., Moorthi, S. Audiogram matching in hearing aid using approximate arithmetic. Multidim Syst Sign Process 32, 1199–1215 (2021). https://doi.org/10.1007/s11045-021-00782-z
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DOI: https://doi.org/10.1007/s11045-021-00782-z