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Analysis and performance results of computing betweenness centrality on IBM Cyclops64

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Abstract

This paper presents a joint study of application and architecture to improve the performance and scalability of an irregular application—computing betweenness centrality—on a many-core architecture IBM Cyclops64. The characteristics of unstructured parallelism, dynamically non-contiguous memory access, and low arithmetic intensity in betweenness centrality pose an obstacle to an efficient mapping of parallel algorithms on such many-core architectures. By identifying several key architectural features, we propose and evaluate efficient strategies for achieving scalability on a massive multi-threading many-core architecture. We demonstrate several optimization strategies including multi-grain parallelism, just-in-time locality with explicit memory hierarchy and non-preemptive thread execution, and fine-grain data synchronization. Comparing with a conventional parallel algorithm, we get 4X-50X improvement in performance and 16X improvement in scalability on a 128-cores IBM Cyclops64 simulator.

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Authors and Affiliations

  1. Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China

    Guangming Tan

  2. Computer Architecture and Parallel Systems Laboratory, University of Delaware, Newark, USA

    Guangming Tan & Guang R. Gao

  3. IBM T. J. Watson Research Center, Cambridge, USA

    Vugranam C. Sreedhar

Authors
  1. Guangming Tan
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  2. Vugranam C. Sreedhar
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  3. Guang R. Gao
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Correspondence to Guangming Tan.

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Tan, G., Sreedhar, V.C. & Gao, G.R. Analysis and performance results of computing betweenness centrality on IBM Cyclops64. J Supercomput 56, 1–24 (2011). https://doi.org/10.1007/s11227-009-0339-9

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  • DOI: https://doi.org/10.1007/s11227-009-0339-9

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