Abstract
With continuous technology scaling, the power density and hence the temperature of Network-on-Chip (NoC) may increase rapidly. This in-turn degrades the performance of the chip and increases the chances of creating thermal hot-spots. Task allocation and scheduling (TAS) in NoC-based Multiprocessor Systems-on-Chip have significant effects on the energy consumption of the chip and the finish time of the application. Temperature profile of a chip depends on the power consumptions of the tiles and their relative positions. In this paper, we have proposed a simulated annealing based thermal-aware Task Allocation and Scheduling (TAS) method which jointly optimizes the task to core allocation and task-scheduling problem for the periodic real-time applications. It is a platform-based TAS procedure and is applicable for the Networks-on-Chip (NoCs) containing both the homogeneous and heterogeneous cores. Along with temperature minimization, our proposed method has also been applied with the objective of minimizing the finish time of the application. The trade-off between the application finish time and the peak temperature of the chip has also been analyzed in this work. An integer linear programming formulation for the TAS problem, mentioned in a recent literature, has been adopted to evaluate the accuracy of the solutions provided by our proposed method. We have also compared our method with a thermal-aware TAS technique proposed in a recent literature and found \(12.74\%\) and \(35.06\%\) improvements in the finish time of the application and the peak temperature of the chip respectively for a fully heterogeneous NoC-platform.
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References
Benini L, Micheli GD (2006) Networks on chips. Morgan Kaufmann, Burlington
Borkar S (1999) Design challenges of technology scaling. IEEE Micro 19(4):23–29
Chantem T, Hu XS, Dick RP (2011) Temperature-aware scheduling and assignment for hard real-time applications on MPSoCs. IEEE Trans Very Large Scale Integr Syst 19(10):1884–1897
Chao HL, Chen YR, Tung SY, Hsiung PA, Chen SJ (2012) Congestion-aware scheduling for NoC-based reconfigurable systems. In: Design, automation test in Europe conference exhibition (DATE), 2012, pp 1561–1566
Chaturvedi V, Singh A, Zhang W, Srikanthan T (2014) Thermal-aware task scheduling for peak temperature minimization under periodic constraint for 3d-MPSoCs. In: 2014 25th IEEE international symposium on rapid system prototyping (RSP), pp 107–113
Coskun AK, Rosing TS, Whisnant KA, Gross KC (2008) Static and dynamic temperature-aware scheduling for multiprocessor socs. IEEE Trans Very Large Scale Integr Syst 16(9):1127–1140
Cox M, Singh AK, Kumar A, Corporaal H (2013) Thermal-aware mapping of streaming applications on 3d multi-processor systems. In: 2013 IEEE 11th symposium on embedded systems for real-time multimedia (ESTIMedia), pp 11–20
Cui J, Maskell DL (2010) High level event driven thermal estimation for thermal aware task allocation and scheduling. In: 2010 15th Asia and South Pacific in design automation conference (ASP-DAC), pp 793–798
Cui Y, Zhang W, Chaturvedi V, Liu W, He B (2014) Thermal-aware task scheduling for 3d-network-on-chip: A bottom-to-top scheme. In: 2014 14th international symposium on integrated circuits (ISIC), pp 224–227
Dick RP (2013) E3s: The embedded system synthesis benchmarks suite. http://ziyang.eecs.umich.edu/~dickrp/e3s/
Fangfa F, Yuxin B, Xinaan H, jinxiang W, Minyan Y, Jia Z (2010) An objective-flexible clustering algorithm for task mapping and scheduling on cluster-based NoC. In: 2010 10th Russian-Chinese symposium on laser physics and laser technologies (RCSLPLT) and 2010 academic symposium on optoelectronics technology (ASOT), pp 369–373
Gay DM (2011) User’s manual for cplex. Tech. rep., IBM
Goplen B, Sapatnekar SS (2006) Placement of thermal vias in 3-d ics using various thermal objectives. IEEE Trans Comput Aided Des Integr Circ Syst 25(4):692–709
Hanafi MZM, Ismail FS, Rosli R (2015) Radial plate fins heat sink model design and optimization. In: 2015 10th Asian control conference (ASCC), pp 1–5
He O, Dong S, Jang W, Bian J, Pan DZ (2012) Unism: Unified scheduling and mapping for general networks on chip. IEEE Trans Very Large Scale Integr Syst 20(8):1496–1509
Hu W, Tang X, Xie B, Chen T, Wang D (2010) An efficient power-aware optimization for task scheduling on NoC-based many-core system. In: 2010 IEEE 10th international conference on computer and information technology (CIT), pp 171–178
Huang J, Buckl C, Raabe A, Knoll A (2011) Energy-aware task allocation for network-on-chip based heterogeneous multiprocessor systems. In: 2011 19th Euromicro international conference on parallel, distributed and network-based processing (PDP), pp 447–454
Huang W, Ghosh S, Velusamy S, Sankaranarayanan K, Skadron K, Stan M (2006) Hotspot: a compact thermal modeling methodology for early-stage vlsi design. IEEE Trans Very Large Scale Integr Syst 14(5):501–513
Semiconductor Industry Association (2011) International technology roadmap for semiconductors (ITRS), technical report. (2011)
JEDEC (2018) Arrhenius equation (for reliability), JEDEC Global Standards for the Microelectronics Industry
Jantsch A, Tenhunen H (2007) Networks on Chip. Springer, New York
Kagiyama Y, Okumura S, Yanagida K, Yoshimoto S, Nakata Y, Izumi S, Kawaguchi H, Yoshimoto M (2012) Bit error rate estimation in sram considering temperature fluctuation. In: 2012 13th International symposium on quality electronic design (ISQED), pp 516–519
Khajekarimi E, Hashemi MR (2013) Energy-aware ilp formulation for application mapping on NoC based MPSoCs. In: 2013 21st Iranian conference on electrical engineering (ICEE), pp 1–5. IEEE
Kundu S, Chattopadhyay S (2014) Network-on-Chip. CRC Press, Boca Raton
Liu Y, Yang Y, Hu J (2010) Clustering-based simultaneous task and voltage scheduling for NoC systems. In: 2010 IEEE/ACM international conference on computer-aided design (ICCAD), pp 277–283
Park MW, Kim YD (1998) A systematic procedure for setting parameters in simulated annealing algorithms. Comput Oper Res 25(3):207–217. https://doi.org/10.1016/S0305-0548(97)00054-3
Raina A, Muthukumar V (2009) Traffic aware scheduling algorithm for network on chip. In: Sixth international conference on information technology: new generations, 2009. ITNG ’09, pp 877–882
Roy K, Mukhopadhyay S, Mahmoodi-Meimand H (2003) Leakage current mechanisms and leakage reduction techniques in deep-submicrometer cmos circuits. Proc IEEE 91(2):305–327
Rudi A, Bartolini A, Lodi A, Benini L (2014) Optimum: thermal-aware task allocation for heterogeneous many-core devices. In: 2014 International conference on high performance computing simulation (HPCS), pp 82–87
Seo E, Jeong J, Park S, Lee J (2008) Energy efficient scheduling of real-time tasks on multicore processors. IEEE Trans Parallel Distrib Syst 19(11):1540–1552
Sheikh HF, Ahmad I (2013) Dynamic task graph scheduling on multicore processors for performance, energy, and temperature optimization. In: 2013 International on green computing conference (IGCC), pp 1–6
Skadron K, Stan M, HW, Velusami S (2003) Temperature-aware microarchitecture: Extended discussion and results. Tech. rep., Univ. of Virginia Dept. of Computer Science Tech. Report CS-2003-08
Soumya J, Chattopadhyay S (2013) Application-specific network-on-chip synthesis with flexible router placement. J. Syst. Archit. 59(7):361–371
Sridhar A, Vincenzi A, Ruggiero M, Brunschwiler T, Atienza D (2010) Compact transient thermal model for 3d ics with liquid cooling via enhanced heat transfer cavity geometries. In: 2010 16th International workshop on thermal investigations of ICs and systems (THERMINIC), pp 1–6
Vallerio K (2008) Task graphs for free (tgff v3.0). Technical Report
Varatkar G, Marculescu R (2003) Communication-aware task scheduling and voltage selection for total systems energy minimization. In: International conference on computer aided design, 2003. ICCAD-2003, pp 510–517
Vecchi MP, Kirkpatrick S (1983) Global wiring by simulated annealing. IEEE Trans Comput Aided Des Integr Circ Syst 2(4):215–222
Wang HS, Zhu X, Peh LS, Malik S (2003) Orion: a power-performance simulator for interconnection networks. In: 35th Annual IEEE/ACM international symposium on microarchitecture, 2002. (MICRO-35). Proceedings, pp 294–305
Wu Z, Fu F, Wang L, Wang J, Lai F (2011) Energy-aware dynamic scheduling for NoC-based MPSoCs. In: 2011 Academic international symposium on optoelectronics and microelectronics technology (AISOMT), pp 308–312
Xie Y, Hung WL (2006) Temperature-aware task allocation and scheduling for embedded multiprocessor systems-on-chip (MPSoC) design. J VLSI Signal Process Syst Signal Image Video Technol 45(3):177–189
Yang PF, Wang Q (2014) Effective task scheduling and ip mapping algorithm for heterogeneous NoC-based MPSoC. Math Probl Eng. https://doi.org/10.1155/2014/202748
Zhang Y, King CR, Zaveri J, Kim YJ, Sahu V, Joshi Y, Bakir MS (2011) Coupled electrical and thermal 3d ic centric microfluidic heat sink design and technology. In: 2011 IEEE 61st electronic components and technology conference (ECTC), pp 2037–2044
Zhou J, Wei T, Chen M, Yan J, Hu S, Ma Y (2015) Thermal-aware task scheduling for energy minimization in heterogeneous real-time MPSoC systems. IEEE Trans Comput Aided Des Integr Circ Syst PP(99):1–1
Zhou X, Yang J, Xu Y, Zhang Y, Zhao J (2010) Thermal-aware task scheduling for 3d multicore processors. IEEE Trans Parallel Distrib Syst 21(1):60–71
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Mukherjee, P., Jain, K. & Chattopadhyay, S. Thermal-aware task allocation and scheduling for periodic real-time applications in mesh-based heterogeneous NoCs. Real-Time Syst 55, 774–809 (2019). https://doi.org/10.1007/s11241-019-09327-x
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DOI: https://doi.org/10.1007/s11241-019-09327-x