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High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation

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Abstract

A high-radix digit-recurrence algorithm for the computation of the logarithm, and an analysis of the tradeoffs between area and speed for its implementation, are presented in this paper. Selection by rounding is used in iterations j ≥ 2, and by table look-up in the first iteration. A sequential architecture is proposed, and estimates of the execution time and hardware requirements are obtained for n = 16, 24, 32, 53 and 64 bits of precision and for radix values from r = 8 to r = 1024. These estimates are obtained according to an approximate model for the delay and area of the main logic blocks. We show that the most efficient implementations are obtained for radices ranging from r = 32 to r = 256, reducing the execution time by half with respect to a radix-4 implementation with redundant arithmetic.

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Author information

Authors and Affiliations

  1. Department of Electronic and Computer Engineering, University of Santiago de Compostela, Spain

    J.-A. Piñeiro

  2. Computer Science Department, University of California, Los Angeles (UCLA), USA

    M. D. Ercegovac

  3. Department of Electronic and Computer Engineering, University of Santiago de Compostela, Spain

    J. D. Bruguera

Authors
  1. J.-A. Piñeiro
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  2. M. D. Ercegovac
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  3. J. D. Bruguera
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Corresponding author

Correspondence to J.-A. Piñeiro.

Additional information

Jose-Alejandro Piñeiro was born in Domayo, Spain. He received the Ph.D. degree in Computer Engineering in 2003, and the M.Sc. degree (1999) and B.Sc. degree (1998) in Physics (Electronics), from the University of Santiago de Compostela, Spain. Since 2004, he has been with Intel Barcelona Research Center, Intel Labs-UPC, whose research focuses on new microarchitectural paradigms and code generation techniques for IA-32, EM64T and IPF families. His research interests are also in the area of computer arithmetic, VLSI design, computer graphics and numerical processors.

Miloš D. Ercegovac is a Professor and Chair in the UCLA Computer Science Department. He earned his MS (‘72) and Ph.D. (‘75) in computer science from the University of Illinois, Urbana-Champaign, and BS in electrical engineering (‘65) from the University of Belgrade, Yugoslavia. Dr. Ercegovac specializes in research and teaching in digital arithmetic, digital design, and computer system architecture. His research contributions have been extensively published in journals and conference proceedings. He is a coauthor of two textbooks on digital design and of a monograph in the area of digital arithmetic. Dr. Ercegovac has been involved in organizing the IEEE Symposia on Computer Arithmetic since 1978. He served as an editor of the IEEE Transactions on Computers and as a subject area editor for the Journal of Parallel and Distributed Computing. Dr. Ercegovac is a senior member of the IEEE Computer Society and a member of the ACM.

Javier D. Bruguera received the B.S. degree in Physics and the Ph.D. degree from the University of Santiago de Compostela (Spain) in 1984 and 1989, respectively. Currently, he is a professor in the Department of Electronic and Computer Engineering at the University of Santiago de Compostela. Previously, he was an assistant professor in the Department of Electrical, Electronic and Computer Engineering at the University of Oviedo, Spain, and an assistant professor in the Department of Electronic Engineering at the University of A Coruña, Spain. He was a visiting researcher in the Application Center of Microelectronics at Siemens in Munich, Germany, and in the Department of Electrical Engineering and Computer Science at the University of California, Irvine. Dr. Bruguera’s primary research interests are in the area of computer arithmetic, processor design, digital design for signal and image processing and parallel architectures.

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Piñeiro, JA., Ercegovac, M.D. & Bruguera, J.D. High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation. J VLSI Sign Process Syst Sign Image Video Technol 40, 109–123 (2005). https://doi.org/10.1007/s11265-005-4941-7

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  • DOI: https://doi.org/10.1007/s11265-005-4941-7

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