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Automated Design Space Exploration for DSP Applications

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Abstract

We present a performance analysis framework that efficiently generates and analyzes hardware designs for computationally intensive signal processing applications. Our framework synthesizes designs from a high level of abstraction into well-constructed and recognizable hardware structures that perform well in terms of area, throughput and power dissipation. Cost functions provided by our framework allow the user to reduce the design space to a set of efficient hardware implementations that meet performance constraints. We utilize our framework to estimate hardware performance using a set of pre-synthesized mathematical cores which expedites the synthesis process by approximately 14 fold. This reduces the architectural generation and hardware synthesis process from days to several hours for complex designs. Our work aims at performing hardware optimizations at the architectural and arithmetic levels, relieving the user from manually describing the designs at the register transfer level and iteratively varying the hardware structures. We illustrate the efficiency and accuracy of our framework by generating finite impulse response filter structures used in several signal processing applications such as adaptive equalizers and quadrature mirror filters. The results show that hardware filter structures generated by our framework can achieve, on average, a 3 fold increase in power efficiency when compared to manually constructed designs.

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Acknowledgements

The work of Ramsey Hourani was supported by the Office of Naval Research and Historically Black Engineering Colleges (ONR/HBEC) Future Engineering Faculty Fellowship Program.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, NC, 27695, USA

    Ramsey Hourani, Ravi Jenkal, W. Rhett Davis & Winser Alexander

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  1. Ramsey Hourani
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  2. Ravi Jenkal
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  3. W. Rhett Davis
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  4. Winser Alexander
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Correspondence to Ramsey Hourani.

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Hourani, R., Jenkal, R., Davis, W.R. et al. Automated Design Space Exploration for DSP Applications. J Sign Process Syst Sign Image Video Technol 56, 199–216 (2009). https://doi.org/10.1007/s11265-008-0226-2

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  • DOI: https://doi.org/10.1007/s11265-008-0226-2

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