Abstract
This paper shows that when a digital receiver is designed utilizing two clock scopes, the digital down-converter can be designed to be efficient in terms of area and power consumption. The main design parameter that contributes to make the design efficient is the relationship between the transition band of the designed filter and its sampling frequency.
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Acknowledgements
This research was supported by FEDER, the Spanish Ministerio de Educación y Ciencia, under Grant no. TEC2005-08406-C03-01 and Generatitat Valenciana, under Grant no. GV06/114.
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Pérez-Pascual, A., Sansaloni, T., Torres, V. et al. Design of Power and Area Efficient Digital Down-converters for Broadband Communications Systems. J Sign Process Syst Sign Image Video Technol 56, 35–40 (2009). https://doi.org/10.1007/s11265-008-0254-y
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DOI: https://doi.org/10.1007/s11265-008-0254-y