Abstract
This paper is concerned with the performance of first- and second- order sigma–delta modulator (ΣΔM) based transmitters with an Orthogonal Frequency Division Modulation (OFDM) signal and Code Division Multiplexing Access (CDMA) signal. In particular, the WorldWide Interoperability for Microwave Access (WiMAX) and Interim Standard 95 (IS-95) down link signals have been used for this study as test signals. The simulation and experimental results showed that the performances of the ΣΔM for both signals are improved by increasing the number of quantization levels and the order of the ΣΔM circuit. A ΣΔ modulator based transmitter using a switching mode power amplifier was developed and built for validation purposes. It is found that the increase of the quantization level of the ΣΔ modulator from 2 to 5 leads to a substantial improvement in the measured power efficiency of the transmitter from 5% to 42%. This improvement in efficiency is in good agreement with simulated and measured results obtained using simulink and FPGA board respectively.
Similar content being viewed by others
References
Johnson, T., & Stapleton, S. P. (2006). RF Class-D amplification with bandpass sigma–delta modulator drive signals. IEEE Transactions on Circuits and Systems, 53(12), 2507–2509.
Samulak, A., Fischer, G., & Weigel, R. (2009). Optimized delta sigma modulation for Class-S power amplifiers based on GaN switching transistors. IEEE Radio and Wireless Symposium. RWS ’09. IEEE, pp. 546–549.
Grebennikov, A., & Sokal, N. O. (2007). Switchmode RF power amplifiers (1st ed.). Burlington: Newnes.
Parikh, V. K., Balsara, P. T., Eliezer, O., & Mehta, J. (2007). A low power and low quantization noise digital sigma–delta modulator for wireless transmitters. ISCAS 2007, pp. 3275–3278.
Hung, T., Rode, J., Larson, L. E., & Asbeck, P. M. (2007). Design of H-bridge Class-D power amplifiers for digital pulse modulation transmitters. IEEE Transactions on Microwave Theory and Techniques, 55(12, part 2), 2845–2855.
Yalowsky, R., Adde, C., & Shannon, C. (2008). Delta sigma modulator implementation for wireless communication applications. Internal Report, Electrical & Electronic Engineering, University of Calgary, Calgary, Canada, April 2008.
Friedman, V., Brinthaupt, D. M., Chen, D.-P., Deppa, T., Elward, J. P., Fields, E. M., et al. (1988). A bit-slice architecture for sigma–delta analog-to-digital converters. IEEE Journal on Selected Areas in Communications, 6(3), 520–526.
Hein, S., & Zakhor, A. (1991). On the stability of interpolative sigma delta modulators. Proceedings of the IEEE International Symposium on Circuits and Systems, 3, 1621–1624.
Marques, A., Bastos, J., Van der Bosh, A., Vandenbussche, J., Steyaert, M., & Sansen, W. (1998). A 12b Accuracy 300 Msample/Supdate Rate CMOS DAC. IEEE-International Solid State Circuit Conference, 216–217.
Marques, A., Peluso, V., Steyaert, M., & Sansen, W. (1998). Optimal parameters for delta-sigma modulator topologies. IEEE Transactions on Circuits and Systems, 45(9), 1232–1241.
Richard, S. (2005). Understanding delta-sigma data converters (pp. 8–23). IEEE Press, c2005.
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Boulejfen, N., Elsayed, F.M., Helaoui, M. et al. Efficiency Enhancement of Sigma–Delta Modulator Based Transmitters Using Multi-Level Quantizers. J Sign Process Syst 69, 125–132 (2012). https://doi.org/10.1007/s11265-011-0634-6
Received:
Revised:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s11265-011-0634-6