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Designs of Approximate Floating-Point Multipliers with Variable Accuracy for Error-Tolerant Applications

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Abstract

Approximate/inexact computing has become an attractive approach for designing high performance and low power arithmetic circuits. Floating-point (FLP) arithmetic is required in many applications, such as digital signal processing, image processing and machine learning. Approximate FLP multipliers with variable accuracy are proposed in this paper; the accuracy and the circuit requirements of these designs are analyzed and assessed according to different metrics. It is shown that the proposed approximate FLP multiplier designs further reduce delay, area, power consumption and power-delay product (PDP) while incurring about half of the normalized mean error distance (NMED) compared with the previous designs. The proposed IFLPM24–15 is the most efficient design when considering both PDP and NMED. Case studies with three error-tolerant applications show the validity of the proposed approximate designs.

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Acknowledgements

This work is supported by grants from National Natural Science Foundation of China (No. 61401197), Natural Science Foundation of Jiangsu Province (BK20151477) and Fundamental Research Funds for the Central Universities China (NS2017024).

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Authors and Affiliations

  1. College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, 29 Jiangjun Avenue, Nanjing, China

    Peipei Yin, Chenghua Wang & Weiqiang Liu

  2. Department of Electrical and Computer Engineering, University of Texas at Austin, 1 University Station C0803, Austin, TX, USA

    Earl E. Swartzlander Jr.

  3. Department of Electrical and Computer Engineering, Northeastern University, 360 Huntington Avenue, Boston, MA, USA

    Fabrizio Lombardi

Authors
  1. Peipei Yin
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  2. Chenghua Wang
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  3. Weiqiang Liu
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  4. Earl E. Swartzlander Jr.
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  5. Fabrizio Lombardi
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Correspondence to Weiqiang Liu.

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Yin, P., Wang, C., Liu, W. et al. Designs of Approximate Floating-Point Multipliers with Variable Accuracy for Error-Tolerant Applications. J Sign Process Syst 90, 641–654 (2018). https://doi.org/10.1007/s11265-017-1280-4

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  • DOI: https://doi.org/10.1007/s11265-017-1280-4

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