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Mitigation of 2D-ICI in Flash Memory Using Hierarchical Constrained Codes

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Abstract

Inter-cell interference (ICI) significantly affects the reliability of flash memory. Both horizontal and vertical ICI have been taken into account for the errors in flash memory. In this paper, we propose a two-dimensional hierarchical constrained code (2D-HCC) to mitigate both horizontal and vertical ICIs of flash memory. The proposed scheme is applied to both single-level cell (SLC) and multi-level cell (MLC) flash memory. Finally, the bit error rate (BER) of the proposed 2D-HCC with/without Bose-Chaudhuri-Hocquenghem (BCH) codes is simulated. The simulated results confirm the advantage of the proposed scheme.

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Authors and Affiliations

  1. The Department of Information and Communication Engineering, Xiamen University, Xiamen, People’s Republic of China

    Qi Zhou, Weikai Xu & Lin Wang

  2. The School of Information Engineering, Guangdong University of Technology, Guangzhou, 510006, China

    Guojun Han

Authors
  1. Qi Zhou
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  2. Weikai Xu
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  3. Lin Wang
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  4. Guojun Han
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Correspondence to Weikai Xu.

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Zhou, Q., Xu, W., Wang, L. et al. Mitigation of 2D-ICI in Flash Memory Using Hierarchical Constrained Codes. J Sign Process Syst 92, 583–589 (2020). https://doi.org/10.1007/s11265-019-01492-3

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  • DOI: https://doi.org/10.1007/s11265-019-01492-3

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