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Polynomial Multiplication Architecture with Integrated Modular Reduction for R-LWE Cryptosystems

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Abstract

The ring-learning with errors (R-LWE) problem is the basic building block of many ciphers resisting quantum-computing attacks and homomorphic encryption enabling computations on encrypted data. The most critical operation in these schemes is modular multiplication of long polynomials with large coefficients. The polynomial multiplication complexity can be reduced by the Karatsuba formula. In this work, a new method is proposed to integrate modular reduction into the Karatsuba polynomial multiplication. Modular reduction is carried out on intermediate segment products instead of the final product so that more substructure sharing is enabled. Moreover, this paper develops a complete architecture for the modular polynomial multiplication. Computation scheduling optimizations are proposed to reduce the memory access and number of clock cycles needed. Taking advantage of the additional shareable substructures, the proposed scheme reduces the size of the memories, which account for the majority of the modular polynomial multiplier silicon area, by 20% and 12.5%, when the Karatsuba decomposition factor is 2 and 3, respectively, and achieves shorter latency compared to prior designs.

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Authors and Affiliations

  1. Dept. of Electrical and Computer Engineering, The Ohio State University, Columbus, USA

    Xinmiao Zhang & Zheang Huai

  2. Dept. of Electrical and Computer Engineering, University of Minnesota, Minneapolis, USA

    Keshab K. Parhi

Authors
  1. Xinmiao Zhang
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  2. Zheang Huai
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  3. Keshab K. Parhi
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Correspondence to Zheang Huai.

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This work is supported in part by Semiconductor Research Corporation under contract number 2020-HW-2988.

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Zhang, X., Huai, Z. & Parhi, K.K. Polynomial Multiplication Architecture with Integrated Modular Reduction for R-LWE Cryptosystems. J Sign Process Syst 94, 799–809 (2022). https://doi.org/10.1007/s11265-022-01746-7

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  • DOI: https://doi.org/10.1007/s11265-022-01746-7

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