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A Novel 2.5–3.1 GHz Wide-Band Low-Noise Amplifier in 0.18 \(\upmu \hbox {m}\) CMOS

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An Erratum to this article was published on 09 December 2014

Abstract

Aiming for the simultaneous realization of constant gain, accurate input and output impedance matching and minimum noise figure (NF) over a wide frequency range, the circuit topology and detailed design of wide broadband low noise amplifier (LNA) are presented in this paper. A novel 2.5–3.1 GHz wide-band LNA with unique characteristics has been presented. Its design and layout are done by TSMC 0.18 \(\upmu \hbox {m}\) technology. Common gate stage has been used to improve input matching. In order to enhance output matching and reduce the noise as well, a buffer stage is utilized. Mid-stages which tend to improve the gain and reverse isolation are exploited. The proposed LNA achieves a power gain of 15.9 dB, a NF of 3.5 dB with an input return loss less than \(-\)11.6, output return loss of \(-\)19.2 to \(-\)19 and reverse isolation of \(-\)38 dB. The LNA consumes 54.6 mW under a supply voltage of 2 V while having some acceptable characteristics.

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Correspondence to Gholamreza Karimi.

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Nouri, M., Karimi, G. A Novel 2.5–3.1 GHz Wide-Band Low-Noise Amplifier in 0.18 \(\upmu \hbox {m}\) CMOS. Wireless Pers Commun 79, 1993–2003 (2014). https://doi.org/10.1007/s11277-014-1969-7

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  • DOI: https://doi.org/10.1007/s11277-014-1969-7

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