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System Level Protection Against Side-Channel Attack Using High Performance Virtual Secure Circuit for Cryptographic Processor

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Abstract

The proposed system portrays the application space examination of a diverse cryptosystem processor with dynamic reconfiguration abilities. It is appropriate to a variety of signal processing application domains namely telecommunications, image processing, video coding and cryptographic processing. To differentiate between application spaces of the processor, the performance is correlated with cutting edge devices, taking ability to program, energy efficiency and computational potential as the important factors. In general the conventional method of computation is processed by means of Virtual Secure Circuit (VSC) on Advanced Encryption Standard (AES) and performance of the device Field Programmable Gate Array (FPGA) after implementation is analyzed in terms of delay and throughput. In the conventional method area overhead and power consumption are less where as the architecture lags in performance and throughput. It has been overcome through the fully parallel pipelined Architecture of the VSC on AES which outperforms the existing method in terms of performance and throughput. The energy efficiency and performance are considerably more important than processor that are used for general purpose, while still preserving a Convenient approach of programming that mainly bank on software oriented languages. The exploit of VSC based AES is to formulate the cryptographic processor held against Side Channel Attacks like attacks based on power supply and electromagnetic signals. Then the experimental result shows the promising outcomes when compared to previous methods.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Solamalai College of Engineering, Madurai, India

    S. Madhavapandian

  2. Department of Electrical Engineering, Government College of Technology, Coimbatore, India

    P. MaruthuPandi

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  1. S. Madhavapandian
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  2. P. MaruthuPandi
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Correspondence to S. Madhavapandian.

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Madhavapandian, S., MaruthuPandi, P. System Level Protection Against Side-Channel Attack Using High Performance Virtual Secure Circuit for Cryptographic Processor. Wireless Pers Commun 117, 2667–2677 (2021). https://doi.org/10.1007/s11277-019-06930-w

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