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Optimized Implementations for ZUC-256 on FPGA

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Abstract

ZUC-128 algorithm was listed as the core part in the third international encryption and integrity protection algorithms, EEA3 and EIA3 in 4G-LTE mobile communication system by 3rd generation partnership project (3GPP). ZUC-256 will soon become one of important encryption and integrity protection algorithms in 5G mobile communication system. Compared with software implementations, hardware implementations using field programmable gate array (FPGA) have significant advantages in terms of performance. Implementation’s solution for ZUC-256 algorithm was studied by using FPGA as the hardware platform, two optimized implementation algorithms for ZUC-256 were proposed based on linear feedback shift register feedback calculation optimization algorithm and S-box replacement optimization algorithm on the platform of Cyclone IV and Spartan-6. The operating efficiency of ZUC-256 algorithm was verified on two FPGA hardware platforms. The test results show that the optimized ZUC-256 keystream generation algorithm has a main frequency of 209.346 MHz and a throughput of 6.542 Gbps on the FPGA. Optimized ZUC-256 algorithm’s performance is improved by 12% compared with the original ZUC-256 algorithm. The running result in our optimized scheme is 214.4% higher than that of the stream cipher algorithm implemented by Kitsos et al., the speed is 95.8% higher than that of the research results from Wang et al., compared with the research results of Zhang et al., this optimized scheme has increased by 45.6%. Moreover, it possesses comprehensive performance advantages compared with the results of Drucker et al. on CCNC 2019. The proposed optimization implementation algorithms for ZUC-256 on FPGA have broad application prospects in the future of 5G system.

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References

  1. Ramasetty, P., & Masilamani, S. (2019). 5G rural strategy in India. In Proceedings of 2019 optical fiber communications conference and exhibition (OFC 2019), IEEE, pp. 1–1.

  2. Ahmad, I., Shahabuddin, S., Kumar, T., et al. (2019). Security for 5G and beyond. IEEE Communications Surveys & Tutorials, 21(4), 3682–3722.

    Article  Google Scholar 

  3. Khan, R., Kumar, P. K., Jayakody, D. N., et al. (2020). A survey on security and privacy of 5G technologies: Potential solutions recent advancements and future directions. IEEE Communications Surveys & Tutorials, 22(1), 196–248.

    Article  Google Scholar 

  4. Wang, P., & Liu, L. (2018). Research on inclusion of a cipher ZUC in ISO standard. Information Technology & Standardization, 5, 28–31.

    Google Scholar 

  5. ETSI/SAGE TS 35.221. (2018). Specification of the 3GPP confidentiality and integrity algorithms 128-EEA3 & 128-EIA3. Document 1: 128-EEA3 and 128-EIA3 specification. 3GPP.

  6. ETSI/SAGE TS 35.222. (2018). Specification of the 3GPP confidentiality and integrity algorithms 128-EEA3 & 128-EIA3. Document 2: ZUC specification. 3GPP.

  7. ETSI/SAGE TS 35.223. (2018). Specification of the 3GPP confidentiality and integrity algorithms 128-EEA3 & 128-EIA3. Document 3: Implementor’s test data. 3GPP.

  8. ETSI/SAGE TR 35.924. (2018). Specification of the 3GPP confidentiality and integrity algorithms 128-EEA3 & 128-EIA3. Document 4: Design and evaluation report. 3GPP.

  9. Drucker, N., & Gueron, S. (2019). Fast constant time implementations of ZUC-256 on x86 CPUs. In Proceedinhs of 2019 16th IEEE annual consumer communications & networking conference (CCNC 2019), IEEE, pp. 1–7.

  10. Design team. (2018). ZUC-256 stream cipher. Journal of Cryptologic Research, 5(2), 167–179.

    Google Scholar 

  11. Liu, Z. B., Zhang, Q. L., Ma, C. Q., et al. (2016). HPAZ: A high-throughput pipeline architecture of ZUC in hardware. In Proceedings of 2016 design, automation & test in Europe conference & exhibition (DATE 2016), IEEE, pp. 269–272.

  12. Zhang, L. C., Xia, L. N., Liu, Z. B., et al. (2012). Evaluating the optimized implementation of SNOW 3G and ZUC on FPGA. In Proceedings of the 2012 IEEE 11th international conference on trust, security and privacy in computing and communications, IEEE, pp. 436–442.

  13. Gupta, S. S., Chattopadhyay, A., Khalid, A. (2011). HiPAcc-LTE: An integrated high performance accelerator for 3GPP LTE stream ciphers. In Proceedings of international conference on cryptology in India (INDOCRYPT 2011), LNCS, Vol. 7107, Springer, Berlin, pp. 196–215.

  14. Kharadkar, R. D., & Hulle, N. B. (2015). FPGA implementation of modulo (231-1) adder. In Proeediongs of 2015 7th international conference on emerging trends in engineering & technology (ICETET 2015), IEEE, pp. 85–90.

  15. Wang, L., Jing, J., Liu, Z., et al. (2011). Evaluating optimized implementations of stream cipher ZUC algorithm on FPGA. In Proceedings of international conference on information and communications security (ICICS 2011), LNCS, Vol. 7043, Springer, Berlin, pp. 202–215.

  16. Zhang, Q. L., Liu, Z. B., Li, M., et al. (2014). A high-throughput unrolled ZUC core for 100Gbbps data transmission. In Proceedings of 19th Australasian conference on information security and privacy Australia (ACISP2014), LNCS 8544, Springer, Berlin, pp. 370–385.

  17. Kitsos, P., Sklavos, N., & Skodras, A. N. (2011). An FPGA implementation of the ZUC stream cipher. In Proceedings 2011 14th Euromicro conference on digital system design, IEEE, pp. 814–817.

  18. Bikos, A. N., & Sklavos, N. (2018). Architecture design of an area efficient high speed crypto processor for 4G LTE. IEEE Transactions on Dependable and Secure Computing, 15(5), 729–741.

    Article  Google Scholar 

  19. Abdrabou, M., Prince, A., & Hosny, S. (2018). Implementation for EEA3 algorithm based on 3GPP standard. In Proceedings of 2018 14th international computer engineering conference (ICENCO 2018), IEEE, pp. 137–140.

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Acknowledgements

This work was supported by the China State Cryptography Development Fund of Thirteen Five-year (MMJJ20170110).

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Authors and Affiliations

  1. Beijing Electronics Science and Technology Institute, Beijing, 100070, China

    Yatao Yang, Wenchen Zhao, Liangqing Xiong & Yingjie Ma

  2. School of Telecommunication Engineering, Xidian University, Xi’an, 710071, China

    Yatao Yang & Ning Wang

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  1. Yatao Yang
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Correspondence to Yatao Yang.

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Yang, Y., Zhao, W., Xiong, L. et al. Optimized Implementations for ZUC-256 on FPGA. Wireless Pers Commun 116, 2615–2632 (2021). https://doi.org/10.1007/s11277-020-07813-1

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