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RevivePath: Resilient Network-on-Chip Design Through Data Path Salvaging of Router

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Abstract

Network-on-Chip (NoC) with excellent scalability and high bandwidth has been considered to be the most promising communication architecture for complex integration systems. However, NoC reliability is getting continuously challenging for the shrinking semiconductor feature size and increasing integration density. Moreover, a single node failure in NoC might destroy the network connectivity and corrupt the entire system. Introducing redundancies is an efficient method to construct a resilient communication path. However, prior work based on redundancies, either results in limited reliability with coarse grain protection or involves even larger hardware overhead with fine grain. In this paper, we notice that data path such as links, buffers and crossbars in NoC can be divided into multiple identical parallel slices, which can be utilized as inherent redundancy to enhance reliability. As long as there is one fault-free slice left available, the proposed salvaging scheme named as RevivePath, can be employed to make the overall data path still functional. Furthermore, RevivePath uses the direct redundancy to protect the control path such as switch arbiter, routing computation, to provide a full fault-tolerant scheme to the whole router. Experimental results show that it achieves quite high reliability with graceful performance degradation even under high fault rate.

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Authors and Affiliations

  1. State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China

    Yin-He Han, Cheng Liu, Hang Lu, Wen-Bo Li, Lei Zhang & Xiao-Wei Li

  2. University of Chinese Academy of Sciences, Beijing, 100049, China

    Yin-He Han, Cheng Liu, Hang Lu, Wen-Bo Li, Lei Zhang & Xiao-Wei Li

Authors
  1. Yin-He Han
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  2. Cheng Liu
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  3. Hang Lu
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  4. Wen-Bo Li
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  5. Lei Zhang
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  6. Xiao-Wei Li
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Correspondence to Yin-He Han.

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Han, YH., Liu, C., Lu, H. et al. RevivePath: Resilient Network-on-Chip Design Through Data Path Salvaging of Router. J. Comput. Sci. Technol. 28, 1045–1053 (2013). https://doi.org/10.1007/s11390-013-1396-3

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