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An Efficient Network-on-Chip Router for Dataflow Architecture

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Abstract

Dataflow architecture has shown its advantages in many high-performance computing cases. In dataflow computing, a large amount of data are frequently transferred among processing elements through the network-on-chip (NoC). Thus the router design has a significant impact on the performance of dataflow architecture. Common routers are designed for control-flow multi-core architecture and we find they are not suitable for dataflow architecture. In this work, we analyze and extract the features of data transfers in NoCs of dataflow architecture: multiple destinations, high injection rate, and performance sensitive to delay. Based on the three features, we propose a novel and efficient NoC router for dataflow architecture. The proposed router supports multi-destination; thus it can transfer data with multiple destinations in a single transfer. Moreover, the router adopts output buffer to maximize throughput and adopts non-flit packets to minimize transfer delay. Experimental results show that the proposed router can improve the performance of dataflow architecture by 3.6x over a state-of-the-art router.

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Authors and Affiliations

  1. State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, 100190, China

    Xiao-Wei Shen, Xiao-Chun Ye, Xu Tan, Da Wang, Wen-Ming Li, Zhi-Min Zhang, Dong-Rui Fan & Ning-Hui Sun

  2. School of Computer and Control Engineering, University of Chinese Academy of Sciences, Beijing, 100049, China

    Xiao-Wei Shen & Xu Tan

  3. Department of Computer Science, The University of Chicago, Chicago, IL, 60637, USA

    Lunkai Zhang

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  1. Xiao-Wei Shen
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  2. Xiao-Chun Ye
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  3. Xu Tan
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Correspondence to Xiao-Chun Ye.

Additional information

Special Section on Dataflow Architecture

This work was supported by the National High Technology Research and Development 863 Program of China under Grant No. 2015AA01A301, the National Natural Science Foundation of China under Grant No. 61332009, the National HeGaoJi Project of China under Grant No. 2013ZX0102-8001-001-001, and the Beijing Municipal Science and Technology Commission under Grant Nos. Z15010101009 and Z151100003615006.

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Shen, XW., Ye, XC., Tan, X. et al. An Efficient Network-on-Chip Router for Dataflow Architecture. J. Comput. Sci. Technol. 32, 11–25 (2017). https://doi.org/10.1007/s11390-017-1703-5

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  • DOI: https://doi.org/10.1007/s11390-017-1703-5

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