Abstract
A novel low-swing interface circuit for high-speed on-chip asynchronous interconnection is proposed in this paper. It takes a differential level-triggered latch to recover digital signal with ultra low-swing voltage less than 50 mV, and the driver part of the interface circuit is optimized for low power using the driver-array method. With a capacity to work up to 500 MHz, the proposed circuit, which is simulated and fabricated using SMIC 0.18-μm 1.8-V digital CMOS technology, consumes less power than previously reported designs.
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References
Liu D, Svensson C. Power consumption estimation in CMOS VLSI chips. IEEE J Solid-State Circ, 1994, 29: 663–670
Colshan R, Jaroun B. A novel reduced swing CMOS BUS interface circuit for high speed low power VLSI systems. Proc. IEEE Int Symp Circ Syst, 1994, 4: 351–354
Burd T. Energy efficient processor system design. Ph.D. dissertation, Univ. Calif., Berkeley, 2001
Zhang H, George V, Rabaey J M. Low-swing on-chip signaling techniques: effectiveness and robustness. IEEE Trans VLSI Syst, 2000, 8: 264–272
Qiao F, Yang H Z, Wang H. Design of low power buffer using driver-array for on-chip IPs interconnection. In: IEEE Proceedings of ASICON’03. Beijing: Institute of Electrical and Electronics Engineering, Inc., 2003. 1218–1221
Rabaey J M. Digital Integrated Circuits: A Design Perspective. Upper Saddle River, NJ: Prentice-Hall International, Inc. 1998. 450–454
Foroudi N, Kwasniewski T A. CMOS high-speed dual-modulus frequency divider for RF frequency synthesis. IEEE J Solid-State Circ, 1995, 30: 93–100
Yang H Z, Qiao F, Huang G, et al. A low-swing differential interface circuit for high-speed on-chip asynchronous interconnection. China Patent: ZL 03124098.4, 2005.07.27
Benini L, Micheli G D. Powering networks on chips. Proc IEEE Int Symp Syst Synth, 2001, 9: 33–38
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Supported in part by the 973 Program of China (Grant No. GI999032903), the National Science Fund for Distinguished Young Scholars (Grant No. 60025101), the Major Program of National Natural Science Foundation of China (Grant No. 90707002)
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Qiao, F., Yang, H., Huang, G. et al. Implementation of low-swing differential interface circuits for high-speed on-chip asynchronous interconnection. Sci. China Ser. F-Inf. Sci. 51, 975–984 (2008). https://doi.org/10.1007/s11432-008-0065-6
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DOI: https://doi.org/10.1007/s11432-008-0065-6