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Design of novel, semi-transparent flip-flops (STFF) for high speed and low power application

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Abstract

This paper presents a novel, semi-transparent structure to implement single-edge and dual-edge triggered flip-flops. These two novel flip-flops can achieve high speed and low power due to their short data paths and fewer redundant transitions. Simulation results show that the proposed semi-transparent flip-flop and dual-edge triggered semi-transparent flip-flop perform best compared with conventional flip-flops. STFF reduces the power-delay-product 33.1% compared with Antonio’s sense amplifier based flip-flop. DSTFF improves the PDP 9.1% and 47.8% as compared with dual-edge triggered sense amplifier based flip-flop and high speed dual-edge triggered modified hybrid latch flip-flop respectively.

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Authors and Affiliations

  1. Key Laboratory of Microelectronics Devices and Circuits (MOE), Department of Microelectronics, Peking University, Beijing, 100871, China

    XiaYu Li, Song Jia, LiMin Liu, Yuan Wang & GangGang Zhang

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  1. XiaYu Li
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  2. Song Jia
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  3. LiMin Liu
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  4. Yuan Wang
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  5. GangGang Zhang
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Correspondence to XiaYu Li.

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Li, X., Jia, S., Liu, L. et al. Design of novel, semi-transparent flip-flops (STFF) for high speed and low power application. Sci. China Inf. Sci. 55, 2390–2398 (2012). https://doi.org/10.1007/s11432-012-4621-8

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  • DOI: https://doi.org/10.1007/s11432-012-4621-8

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