Abstract
A low power fully integrated digital TV tuner chip for China Mobile Multimedia Broadcasting (CMMB) application is presented. Based on direction conversion architecture, analog 8th-order filter/gain stages utilizing high power efficient operation-amplifiers and a ΣΔ fractional-N phase locked loop (PLL) with one voltage controlled oscillator (VCO) covering 4.8–7.2 GHz is proposed for low power and small chip area. The tuner is implemented in 65 nm CMOS process with low noise amplifier (LNA) matching network and phase locked loop (PLL) filter integrated on chip, occupying a chip area of 4.83 mm2. The measured noise figure (NF) is less than 3.2 dB over CMMB UHF band (470–798 MHz). A total power consumption of 65 mW (54 mA from 1.2 V supply) is achieved.
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Liu, J., Li, C., Chen, L. et al. A 65 mW fully integrated UHF-band CMMB tuner in 65 nm CMOS process. Sci. China Inf. Sci. 56, 1–5 (2013). https://doi.org/10.1007/s11432-012-4708-2
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DOI: https://doi.org/10.1007/s11432-012-4708-2