Abstract
This paper investigates the influence of the short-channel effects (SCEs) on the static noise margin (SNM) of 6T (6 transistors) SRAM composed of 2D MOSFETs. An analytical all-region I-V model for short-channel complementary 2D MOSFETs has been developed, and a simulation model has been built to calculate SNM with the consideration of SCEs and velocity saturation. The results show that there exists an optimal value of channel length (Lopt) where SNM reaches a maximum, and Lopt is approximately three times the scale length. In the region where L>Lopt, SNM increases slightly as L decreases because of velocity saturation, while in the region where L<Lopt, SNM decreases rapidly as L decreases as the SCEs are dominant. The worst case of SNM reduction due to the threshold voltage (VT) fluctuation is investigated, and the maximum VT tolerance is studied as a function of L. In an SRAM with a scale length of 5 nm, as L decreases from 15 nm to 5 nm, SNM decreases from 155 mV to 98 mV, and the maximum VT tolerance decreases from 126 mV to 105 mV.
Similar content being viewed by others
References
Fiori G, Bonaccorso F, Iannaccone G, et al. Electronics based on two-dimensional materials. Nat Nanotech, 2014, 9: 768–779
Roy T, Tosun M, Kang J S, et al. Field-effect transistors built from all two-dimensional material components. ACS Nano, 2014, 8: 6259–6264
Liu H, Ye P D. MoS2 Dual-gate MOSFET with atomic-layer-deposited Al2O3 as top-gate dielectric. IEEE Electron Device Lett, 2012, 33: 546–548
Li X F, Gao T T, Wu Y Q. Development of two-dimensional materials for electronic applications. Sci China Inf Sci, 2016, 59: 061405
Liang R, Jiang C, Wang J, et al. An analytical charge-sheet drain current model for monolayer transition metal dichalcogenide negative capacitance field-effect transistors. In: Proceedings of IEEE Electron Devices Technology and Manufacturing Conference (EDTM), Toyama, 2017. 268–269
Cao W, Kang J, Liu W, et al. A compact current-voltage model for 2D semiconductor based field-effect transistors considering interface traps, mobility degradation, and inefficient doping effect. IEEE Trans Electron Dev, 2014, 61: 4282–4290
Xie Q, Xu J, Taur Y. Review and critique of analytic models of MOSFET short-channel effects in subthreshold. IEEE Trans Electron Dev, 2012, 59: 1569–1579
Wang R S, Yu T, Huang R, et al. Impacts of short-channel effects on the random threshold voltage variation in nanoscale transistors. Sci China Inf Sci, 2013, 56: 062403
Baum G, Beneking H. Drift velocity saturation in MOS transistors. IEEE Trans Electron Dev, 1970, 17: 481–482
Taur Y, Wu J, Min J. A short-channel I-V model for 2-D MOSFETs. IEEE Trans Electron Dev, 2016, 63: 2550–2555
Chen C, Xie Q. Investigation on the static noise margin of 6T SRAM composed of 2D semiconductor MOSFETs. In: Proceedings of the 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, 2016. 805–807
Seevinck E, List F J, Lohstroh J. Static-noise margin analysis of MOS SRAM cells. IEEE J Solid-State Circ, 1987, 22: 748–754
Yao J, Ye Z, Wang Y. An efficient SRAM yield analysis and optimization method with adaptive online surrogate modeling. IEEE Trans Very Large Scale Integr Syst, 2015, 23: 1245–1253
Jiménez D. Drift-diffusion model for single layer transition metal dichalcogenide field-effect transistors. Appl Phys Lett, 2012, 101: 243501
Lohstroh J, Seevinck E, de Groot J. Worst-case static noise margin criteria for logic circuits and their mathematical equivalence. IEEE J Solid-State Circ, 1983, 18: 803–807
Liang X, Taur Y. A 2-D analytical solution for SCEs in DG MOSFETs. IEEE Trans Electron Dev, 2004, 51: 1385–1391
Taur Y, Liang X, Wang W, et al. A continuous, analytic drain-current model for DG MOSFETs. IEEE Electron Dev Lett, 2004, 25: 107–109
Zhang L, Yu Z, He X. A statistical characterization of CMOS process fluctuations in subthreshold current mirrors. In: Prcoeedings of the 9th International Symposium on Quality Electronic Design, San Jose, 2008. 152–155
Xie Q, Zhao M, Xu J, et al. Static noise margin analysis of double-gate MOSFETs SRAM. In: Prcoeedings of the 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, Suzhou, 2009. 672–676
Acknowledgements
This work was supported by Applied Basic Research Programs of Science and Technology Department of Sichuan Province, China (Grant No. M110103012016JY0044).
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Xie, Q., Chen, C., Liu, M. et al. Short-channel effects on the static noise margin of 6T SRAM composed of 2D semiconductor MOSFETs. Sci. China Inf. Sci. 62, 62404 (2019). https://doi.org/10.1007/s11432-018-9429-2
Received:
Revised:
Accepted:
Published:
DOI: https://doi.org/10.1007/s11432-018-9429-2