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64 × 64 GM-APD array-based readout integrated circuit for 3D imaging applications

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Abstract

Using the high sensitivity of the avalanche photodiode (APD) detector operated in the Geiger-mode (GM), an array readout integrated circuit (ROIC) comprising a two-segment time-to-digital converter (TDC) is employed for wide-dynamic time interval measurement, where a 1-bit low-segment TDC is implemented by discriminating a single-phase clock period. The proposed 64 × 64 GM-APD array ROIC fabricated using Taiwan semiconductor manufacturing company (TSMC) 0.18-µm complementary metal oxide semiconductor (CMOS) technology can operate at a maximum frequency of 500 MHz provided by an external phase-locked loop clock. The time resolution is reduced to < 1 ns along with a maximum range of 4 µs; the differential non-linearity (DNL) and integral non-linearity (INL) are restricted to approximately −0.15 to 0.15 least significant bit (LSB) and −0.3 to 0.32 LSB, respectively; and the power consumption is 490 mW under a frame rate of 20 kHz. The developed ROIC is successfully used in imaging applications in two different ways.

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Acknowledgements

This work was supported by Natural Key R&D Program of China (Grant No. 2016YFB0400904), National Natural Science Foundation of China (Grant No. 61805036), Natural Science Foundation of Jiangsu Province (Grant No. BK20181139), and Fundamental Research for Funds for Central Universities. We also appreciate the supporting in system testing and applications from the 44th Research Institute of China Electronics Technology Group Corporation.

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Correspondence to Lixia Zheng.

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Wu, J., Qian, Z., Zhao, Y. et al. 64 × 64 GM-APD array-based readout integrated circuit for 3D imaging applications. Sci. China Inf. Sci. 62, 62407 (2019). https://doi.org/10.1007/s11432-018-9712-7

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  • DOI: https://doi.org/10.1007/s11432-018-9712-7

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