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Circuit design of RRAM-based neuromorphic hardware systems for classification and modified Hebbian learning

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Abstract

This paper proposes a solution to the learning of neuromorphic hardware systems based on metal-oxide resistive random access memory (RRAM) arrays, which are used as binary electronic synapses. A modified Hebbian learning method is developed to update the binary synaptic weights, and mixed-signal circuits are designed to implement the proposed learning method. The circuits are verified by SPICE, and systematic simulations are also conducted to verify the capability of the neuromorphic system to process relatively large databases. The results show that the system presents high processing speed (106 examples per second) for both classification and learning, and a high recognition accuracy (up to 95.6%) on the MNIST database.

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Acknowledgements

This work was supported by National Natural Science Foundation of China (Grant Nos. 61421005, 61334007, 61604005).

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Authors and Affiliations

  1. Institute of Microelectronics, Peking University, Beijing, 100871, China

    Yuning Jiang, Peng Huang, Zheng Zhou & Jinfeng Kang

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  1. Yuning Jiang
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  2. Peng Huang
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  3. Zheng Zhou
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  4. Jinfeng Kang
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Correspondence to Jinfeng Kang.

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Jiang, Y., Huang, P., Zhou, Z. et al. Circuit design of RRAM-based neuromorphic hardware systems for classification and modified Hebbian learning. Sci. China Inf. Sci. 62, 62408 (2019). https://doi.org/10.1007/s11432-018-9863-6

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  • DOI: https://doi.org/10.1007/s11432-018-9863-6

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