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A novel tunnel FET design through hybrid modulation with optimized subthreshold characteristics and high drive capability

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References

  1. Ionescu A M, Riel H. Tunnel field-effect transistors as energy-efficient electronic switches. Nature, 2011, 479: 329–337

    Article  Google Scholar 

  2. Huang Q Q, Jia R D, Chen C. First foundry platform of complementary tunnel-FETs in CMOS baseline technology for ultralow-power IoT applications: man-ufacturability, variability and technology roadmap. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), Washington, 2015. 604–607

  3. Jia R D, Huang Q Q, Huang R. Vertical SnS2/Si het-erostructure for tunnel diodes. Sci China Inf Sci, 2020, 63: 122401

    Article  Google Scholar 

  4. Huang Q Q, Huang R, Zhan Z. A novel Si tunnel FET with 36 mV/dec subthreshold slope based on junction depleted-modulation through striped gate configuration. In: Proceedings of International Electron Devices Meeting, San Francisco, 2012. 187–190

  5. Huang Q Q, Huang R, Wu C L. Comprehensive performance re-assessment of TFETs with a novel design by gate and source engineering from device/circuit perspective. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2014. 335–338

  6. Kim M, Wakabayashi Y, Nakane R. High Ion/Ioff Ge-source ultrathin body strained-SOI tunnel FETs: impact of channel strain, MOS interfaces and back gate on the electrical properties. In: Proceedings of IEEE International Electron Devices Meeting, San Francisco, 2014. 331–334

  7. Memisevic E, Svensson J, Hellenbrand M. Vertical InAs/GaAsSb/GaSb tunneling field-effect transistor on Si with S = 48 mV/decade and Ion=10 µA/µm for Ioff = 1 nA/µm at VDS=0.3 V. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), San Francisco, 2016. 500–503

  8. Wu C L, Huang Q Q, Zhao Y, et al. A novel tunnel FET design with stacked source configuration for average subthreshold swing reduction. IEEE Trans Electron Devices, 2016, 63: 5072–5076

    Article  Google Scholar 

  9. Zhao Y, Wu C L, Huang Q Q, et al. A novel tunnel FET design through adaptive bandgap engineering with constant sub-threshold slope over 5 decades of current and high ION/IOFF ratio. IEEE Electron Device Lett, 2017, 38: 540–543

    Article  Google Scholar 

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Acknowledgements

This work was partly supported by National Science and Technology Major Project (Grant No. 2017ZX02315001-004), National Natural Science Foundation of China (Grant Nos. 61851401, 61421005, 61822401, 61604006), and the 111 Project (Grant No. B18001).

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Correspondence to Qianqian Huang or Ru Huang.

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Zhao, Y., Huang, Q. & Huang, R. A novel tunnel FET design through hybrid modulation with optimized subthreshold characteristics and high drive capability. Sci. China Inf. Sci. 63, 129402 (2020). https://doi.org/10.1007/s11432-019-9874-9

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  • DOI: https://doi.org/10.1007/s11432-019-9874-9

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