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A Hf0.5Zr0.5O2 ferroelectric capacitor-based half-destructive read scheme for computing-in-memory

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References

  1. Chen W-H, Li K-X, Lin W-Y, et al. A 65nm 1Mb non-volatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors. In: Proceedings of IEEE International Solid-State Circuits Conference-(ISSCC), 2018

  2. Wu J Y, Chen Y S, Khwa W S, et al. A 40nm low-power logic compatible phase change memory technology. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), 2018

  3. Slesazeck S, Havel V, Breyer E, et al. Uniting the trinity of ferroelectric HfO2 memory devices in a single memory cell. In: Proceedings of IEEE 11th International Memory Workshop (IMW), 2019

  4. Hassan H, Patel M, Kim J S, et al. CROW: a low-cost substrate for improving DRAM performance, energy efficiency, and reliability. In: Proceedings of ACM/IEEE 46th Annual International Symposium on Computer Architecture (ISCA), 2019

  5. Slesazeck S, Ravsher T, Havel V, et al. A 2TnC ferroelectric memory gain cell suitable for compute-in-memory and neuromorphic application. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), 2019

  6. Wang Q, Zhang D L, Zhao Y L, et al. A 1T2C FeCAP-based in-situ bitwise X(N)OR logic operation with two-step write-back circuit for accelerating compute-in-memory. Micromachines, 2021, 12: 385

    Article  Google Scholar 

  7. Aziz A, Ghosh S, Datta S, et al. Physics-based circuit-compatible SPICE model for ferroelectric transistors. IEEE Electron Device Lett, 2016, 37: 805–808

    Google Scholar 

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Acknowledgements

This work was supported in part by National Key R&D Program of China (Grant No. 2019YFB2204800), Major Scientific Research Project of Zhejiang Lab (Grant No. 2019KC0AD02), National Natural Science Foundation of China (Grant Nos. 61904200, 92164204, 62025406), and Strategic Priority Research Program of the Chinese Academy of Sciences (Grant No. XDB44000000).

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Authors and Affiliations

  1. Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, 100029, China

    Yulin Zhao, Yuan Wang, Donglin Zhang, Zhongze Han, Qiao Hu, Xuanzhi Liu, Qingting Ding, Jinhui Cheng, Qing Luo, Jianguo Yang & Hangbing Lv

  2. University of Chinese Academy of Sciences, Beijing, 100049, China

    Yulin Zhao, Yuan Wang, Donglin Zhang, Zhongze Han, Qingting Ding, Qing Luo, Jianguo Yang & Hangbing Lv

  3. Zhejiang Lab, Hangzhou, 311121, China

    Wenjun Zhang, Yue Cao, Ruixi Zhou & Jianguo Yang

  4. School of Microelectronics, University of Science and Technology of China, Hefei, 230000, China

    Qiao Hu, Xuanzhi Liu & Jinhui Cheng

Authors
  1. Yulin Zhao
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  2. Yuan Wang
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  3. Donglin Zhang
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  4. Zhongze Han
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  5. Qiao Hu
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  6. Xuanzhi Liu
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  7. Qingting Ding
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  8. Jinhui Cheng
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  9. Wenjun Zhang
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  10. Yue Cao
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  11. Ruixi Zhou
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  12. Qing Luo
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  13. Jianguo Yang
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  14. Hangbing Lv
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Corresponding author

Correspondence to Jianguo Yang.

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Supporting information

Appendixes A–D. The supporting information is available online at info.scichina.com and link.springer.com. The supporting materials are published as submitted, without typesetting or editing. The responsibility for scientific accuracy and content remains entirely with the authors.

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Zhao, Y., Wang, Y., Zhang, D. et al. A Hf0.5Zr0.5O2 ferroelectric capacitor-based half-destructive read scheme for computing-in-memory. Sci. China Inf. Sci. 66, 159402 (2023). https://doi.org/10.1007/s11432-021-3490-3

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  • DOI: https://doi.org/10.1007/s11432-021-3490-3

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