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An architecture based on reconfigurability and asynchronism for real-time image processing

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Abstract

This paper presents the evolution of the Associative Mesh, a massively parallel SIMD architecture based on reconfigurability and asynchronism. To favor its System on Chip implementation, we introduce a reorganization of the structure based on processors virtualization and evaluate its consequences on hardware cost and algorithmic performances. Using an evaluation environment based on a programming library and a parameterized description of the architecture, we show that a virtualized Associative Mesh achieves real-time execution for a number of complex image processing algorithms, including split and merge segmentation, watershed segmentation and motion detection.

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Correspondence to Julien Denoulet.

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Denoulet, J., Mérigot, A. An architecture based on reconfigurability and asynchronism for real-time image processing. J Real-Time Image Proc 3, 119–130 (2008). https://doi.org/10.1007/s11554-007-0063-8

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  • DOI: https://doi.org/10.1007/s11554-007-0063-8

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