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Real-time implementation of an adaptive simultaneous dynamic range compression and local contrast enhancement algorithm on a GPU

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Abstract

Dynamic range compression is a fundamental function required in digital video cameras and display monitors to improve the visual appeal of color images. This paper presents a real-time implementation of an algorithm for adaptive dynamic range compression and contrast enhancement on a graphics processing unit (GPU). To achieve this, we first designed an adaptive intensity transfer function to handle the enhancement of standard-dynamic-range (8 bits/channel) images with both low- and high-intensity. The proposed algorithm then combines the intensity transfer function with an existing simultaneous dynamic range compression and local contrast enhancement (SDRCLCE) algorithm for the simultaneous compression of dynamic range and enhancement of local contrast. To reach real-time performance in processing high-resolution color images, the proposed algorithm is implemented using an NVIDIA GeForce GTX 650 Ti GPU based on NVIDIA’s Compute Unified Device Architecture (CUDA) parallel programming running on a 3.33 GHz Intel Core i5-661 CPU. Compared with a LUT-accelerated implementation, the proposed GPU implementation was shown to accelerate the processing of 1024 × 1024 color images by 11.1 times and color images of 4096 × 4096 pixels by 7.5 times, including the cost of memory copy between the host and device.

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Acknowledgments

This work was supported by the National Science Council of Taiwan, ROC, under grant NSC 103-2221-E-032-068 and 103-2632-E-032-001-MY3.

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  1. Department of Electrical Engineering, Tamkang University, 151 Ying-chuan Road, Danshui District, New Taipei City, 251, Taiwan, ROC

    Chi-Yi Tsai & Chih-Hung Huang

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  1. Chi-Yi Tsai
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Correspondence to Chi-Yi Tsai.

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Tsai, CY., Huang, CH. Real-time implementation of an adaptive simultaneous dynamic range compression and local contrast enhancement algorithm on a GPU. J Real-Time Image Proc 16, 321–337 (2019). https://doi.org/10.1007/s11554-015-0532-4

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