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A novel global methodology to analyze the embeddability of real-time image processing algorithms

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Abstract

Advanced driver assistance systems applications increasingly use cameras and image processing algorithms. To embed and achieve real-time execution of these algorithms, semiconductor companies propose heterogeneous systems-on-chip (SoCs). Embedding algorithms on this type of hardware is not trivial: One needs to determine how to partition the computational load on the different processing units. In addition, it is not easy to predict whether a given algorithm can be executed on a given heterogeneous SoC while meeting real-time constraints. We propose a novel global methodology to assist with embedding image processing algorithms on heterogeneous SoC while meeting real-time constraints (using a soft real-time analysis). Our approach proposes several heuristics predicting delays and execution times and is based on a set of multi-level test vectors which extract key features of heterogeneous architectures.

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Authors and Affiliations

  1. Renault S.A.S., Guyancourt, France

    Romain Saussard & Boubker Bouzid

  2. SATIE, Université Paris Sud, Université Paris Saclay, Orsay, France

    Romain Saussard, Marius Vasiliu & Roger Reynaud

Authors
  1. Romain Saussard
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  2. Boubker Bouzid
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  3. Marius Vasiliu
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  4. Roger Reynaud
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Correspondence to Romain Saussard.

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Saussard, R., Bouzid, B., Vasiliu, M. et al. A novel global methodology to analyze the embeddability of real-time image processing algorithms. J Real-Time Image Proc 14, 565–583 (2018). https://doi.org/10.1007/s11554-017-0686-3

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