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An exploration of mechanisms for dynamic cryptographic instruction set extension

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Abstract

Instruction set extensions (ISEs) supplement a host processor with special-purpose, typically fixed-function hardware components and instructions to utilise them. For cryptographic use-cases, this can be very effective due to the demand for non-standard or niche operations that are not supported by general-purpose architectures. However, one disadvantage of fixed-function ISEs is inflexibility, contradicting a need for “algorithm agility”. This paper explores a new approach, namely the provision of reconfigurable mechanisms to support dynamic (run-time changeable) ISEs. Our results, obtained using an FPGA-based LEON3 prototype, show that this approach provides a flexible general-purpose platform for cryptographic ISEs with all known advantages of previous work, but relies on careful analysis of the associated security issues.

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Authors and Affiliations

  1. Department of Computer Science, University of Bristol, Merchant Venturers Building, Woodland Road, Bristol, BS8 1UB, UK

    P. Grabher, S. Hoerder, D. Page, S. Tillich & M. Wójcik

  2. Laboratory of Algorithmics, Cryptology and Security (LACS), University of Luxembourg, 6 rue Richard Coudenhove-Kalergi, L1359, Luxembourg, Luxembourg

    J. Großschädl

  3. Department of Information and Computer Science, Aalto University, P.O.Box 15400, 00076, Aalto, Finland

    K. Järvinen

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  1. P. Grabher
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  2. J. Großschädl
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  3. S. Hoerder
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  4. K. Järvinen
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  5. D. Page
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  6. S. Tillich
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  7. M. Wójcik
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Correspondence to P. Grabher.

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Grabher, P., Großschädl, J., Hoerder, S. et al. An exploration of mechanisms for dynamic cryptographic instruction set extension. J Cryptogr Eng 2, 1–18 (2012). https://doi.org/10.1007/s13389-011-0025-8

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  • DOI: https://doi.org/10.1007/s13389-011-0025-8

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