Minimal stretching of a layout to ensure 2-layer wirability☆
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Cited by (7)
Wiring edge-disjoint layouts
1999, Computational Geometry: Theory and ApplicationsVLSI network design
1995, Handbooks in Operations Research and Management ScienceA hierarchy preserving hierarchical bottom-up 2-layer wiring algorithm with respect to via minimization
1993, Integration, the VLSI JournalOn ensuring multilayer wirability by stretching layouts
1998, VLSI DesignWiring edge-disjoint layouts
1997, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)Wiring Knock-Knee Layouts: A Global Approach
1994, IEEE Transactions on Computers
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Research supported by DFG, SFB124, TP B1/B2, VLSI Entwurfsmethoden und Parallelität, Lehrstuhl Prof. Dr. Mehlhorn & Lehrstuhl Prof. Dr. Hotz.
Copyright © 1991 Published by Elsevier B.V.