The design of a high-performance cache controller: a case study in asynchronous synthesis
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2019, 2019 IEEE 10th Latin American Symposium on Circuits and Systems, LASCAS 2019 - ProceedingsImproving the Energy Efficiency of Pipelined Delay Lines Through Adaptive Granularity
2015, IEEE Transactions on Very Large Scale Integration (VLSI) SystemsMinimization and encoding of high performance asynchronous state machines based on genetic algorithm
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Steven M. Nowick is an Assistant Professor of Computer Science at Columbia University. His main research interests include the synthesis of asynchronous circuits, computer-aided design, and verification of finite-state concurrent systems. He received a B.A. from Yale University in 1976 and a Ph.D. in Computer Science from Stanford University in 1993. His Ph.D. thesis presents an automatic synthesis method for burst-mode asynchronous state machines. Dr. Nowick worked two summers as a researcher at Hewlett-Packard Laboratories in Palo Alto, California, where he developed an automatic verification tool for asynchronous state machines. He has received a Best Paper Award and a Best Paper Nomination at international conferences.
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Mark E. Dean is Director of Architecture for Power Personal Systems within IBM. He is responsible for system and subsystem architecture for computers based on the PowerPC processor and the PowerPC Reference Platform definition. His previous responsibilities include lead architect and designer of the IBM PC/AT/PS2 Model 70 and Model 80, and the PC/AT bus (ISA). Dr. Dean received his Ph.D. from Stanford University in June, 1992, his M.S.E.E. from Florida Atlantic University in April, 1982, and his B.S.E.E. from the University of Tennessee in September, 1979. His Ph.D. thesis involved the definition of a self-timed sequencing structure called “dynamic clocking”, and a self-timed RISC processor called “STRiP”.
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David L. Dill is an Assistant Professor of Computer Science at Stanford University and a member of the Computer Systems Laboratory at Stanford. His research interests include formal verification of finite-state systems, including digital control circuits, protocols, and hard real-time systems, and the design and automatic synthesis of asynchronous circuits. He received an S.B. in Computer Science and Engineering from the Massachusetts Institute of Technology in 1979 and Ph.D. in Computer Science from Carnegie Mellon University in 1987. His Ph.D. thesis, on automatic verification of speed-independent circuits, has been published by the M.I.T. Press as an ACM Distinguished Dissertation. He received a Presidential Young Investigator award from the National Science Foundation in 1988 and was named a Young Investigator by the Office of Naval Research in 1991.
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Mark Horowitz received his B.S. and M.S. in Electrical Engineering from M.I.T. in 1978, and his Ph.D. in the same field from Stanford in 1984. He is currently an Associate Professor of Electrical Engineering at Stanford University, where his research interests are in digital integrated circuit design. Dr. Horowitz has led a number of processor design projects at Stanford, including MIPS-X, one of the first processors to include an on-chip instruction cache, and TORCH, a statically-scheduled superscalar processor. In 1990 he took a leave from Stanford to help start Rambus Inc., a company designing high-bandwidth memory interface technology. His current research includes work in both high-speed and low power circuits, memory design, processor architecture, and IC CAD tools.