Implementing an insertion heuristic for vehicle routing on parallel hardware

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Abstract

In this paper, we report about the implementation of an insertion heuristic for the vehicle routing and scheduling problem with time windows on transputers. As it is experimentally demonstrated on a standard set of test problems, a good parallel implementation can produce a very substantial reduction in computation time. In particular, two procedures are described for reducing communication and idle time when the number of processors grows up.

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He received his M.Sc. degree in Electrical Engineering from Montreal University. His current research interests are in the implementation of functional languages on parallel architectures.

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