Defects in silicon oxynitride gate dielectric films

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Abstract

As the aggressive scaling of the metal-oxide-semiconductor structure continues, new reliability challenges in gate dielectric materials now came across as the gate dielectric thickness will be further down scaled to its technological constraint (<3 nm). Since the interface thickness and the capture cross-section of dielectric traps are not scalable, the nano device structures and the giga-scale circuit architectures call for a fabrication process with ultra-high uniformity and repeatability for devices. These put strengthen constraints on the trap density and chemical composition fluctuations of the gate dielectric materials. This paper reviews several important issues of the dielectric traps in oxynitride. Particularly, the paramagnetic defects (Si, SiOO, Si2N), diamagnetic defects (SiSi, NH), dicoordinated Si center (Si:) and neutral defects (SiO, SiOH, SiOOSi) are discussed in detail based on both the experimental and simulation results.

Introduction

As the aggressive scaling of the metal-oxide-semiconductor (MOS) structure goes on, new reliability challenges in gate dielectric materials now came across [1], [2], [3], [4], [5] as the gate dielectric thickness will be further down scaled to less than 3 nm in the nanoscale devices. Although preparation of 1.3 nm ultra-thin gate oxide has been attempted recently by a research group of Bell Laboratories [1], reliability study conducted by Degraeve, Kaczer and Groeseneken shows that an oxide films below 2.5 nm are not good enough because the characteristics have wider statistical spreads and depend more stronger on the temperature [2].

The gate dielectric reliability becomes crucial because the interface thickness and the trap capture cross-section are not scalable. In conventional oxide, the interface layer, in the form of suboxide, is about 5 Å thick and most of the oxide traps are found in this transition region. It was found experimentally that the cross-section for the capture of charge carrier (σ) in oxide could be as large as 10−14 cm2. This value corresponds to an effective capture radius of the trap R=σ/π of about 5.6 Å. These parameters are the technological limits of the thickness of oxide film. On the other hand, the retention time requirement for memory is generally over 10 years [5]. This requirement calls for a very low leakage tunnel oxide. However in very thin oxide the interface region and the trap capture cross-sections are so large (when compared to the total oxide thickness) that the interface traps can play a dominant role in the tunneling characteristics. Meanwhile, the number of electrons stored in the floating gate will be scaled down to about 3000 in the 1 Gbit generation [5], any non-uniformity in chemical composition and even surface roughness fluctuation will cause significant charge fluctuation.

To meet this challenge, it is proposed that the amorphous gate silicon dioxide should be replaced by amorphous silicon oxynitride (SiOxNy) [6], [7], [8], [9], [10], [11] or stacked oxide/nitride dielectric [11]. Silicon nitride prepared by chemical vapor deposition (CVD) is not in good device quality because of the inherent stain in the networks of the amorphous structure [12]. The physical configurations of the network atoms are confined by the bending and stretching forces. It was found that these constraint forces are a linear function of the average coordination number of the atoms [12]. For silicon, the average coordination number is 2.67 and is optimal because bending forces at oxygen atoms are too weak to function as significant constraints. In silicon nitride the corresponding coordination number is 3.43 and the networks are over-constrained. As the silicon atom stretching constraints are stronger than bending constraints, strain energy will be accumulated along the bending constraints in silicon nitride. The average bond angle is distorted and more defects are resulted. The difference in the bending constraints also results in the poor Si/Si3N4 interface. Stacked structure is one of the solutions for making use the advantages of oxide and nitride. Oxide-Nitride-Oxide (ONO) structure has been widely used in the DRAM and EEPROM devices. However, the properties are not good enough for active device applications. Oxynitride is a good approach to improve the dielectric properties. It can be used for bridging the oxide and nitride and their interface to silicon substrate. Fig. 1 compares the atomic structures of silicon oxide and silicon oxynitride. Data in Fig. 1 are taken from Ref. [13]. The SiO bond length was prolonged and the bonding angle of SiOSi become larger and more defects are still expected in oxynitride. The non-stoichiometric silicon oxynitride (with excess silicon) may consist of SiO, SiN and SiSi bonds. To the first order approximation, its bandgap are expected to vary linearly between 5 eV (oxide) and 9 eV (nitride). The grade interface is more effective in reducing the direct tunneling and the interface defect density. These principles can be used to improve the dielectric properties of oxynitride films. Unfortunately, the properties of oxynitride obtained to-date are far below our expectation because of technological problems. The amount of dielectric defects in oxynitride by ammonia (NH3) nitridation would be very large because of the hydrogen incorporation [6], [7], [8], [9], [10]. Although nitrous oxide (N2O) nitridation seems to have the advantage of low hydrogen content, the amount of nitrogen incorporation, in the range of 2–4 at.%, is still not large enough to improve the hardness for hot carrier irradiation [14]. In addition, this process further suffers from many difficulties. The uniformity and reproducibility between wafers and batches are very poor. Moreover, thermodynamically, nitridation of oxide is much difficult than silicon oxidation even at high temperature. The worst of it is that the defect density is not minimized. Instead, the defect origins are almost three fold: the oxide and nitride defects and their new variants can be found in the oxynitride. The paper reviews several important issues of the dielectric traps in oxynitride. Particularly, the paramagnetic defects (Si, SiOO, Si2N), diamagnetic defects (SiSi, NH), dicoordinated Si center (Si:) and neutral defects (SiO, Si:, SiOH, SiOOSi) are discussed in detail based on both the experimental and simulation results. A new oxynitride preparation method with low hydrogen content and high nitrogen content is proposed.

Section snippets

Trap classifications

The electronic quality of a gate dielectric film is governed by the neutral and charged electronic defects. These defects could be physical in several forms of non-bridging or dangling silicon and oxygen bonds. Interstitial or bonded impurities can also serves as the electronic trap centers. From physical point of view, the dangling bonds and the impurities modify the local potentials around these sites. As a result, the bound state solutions to the Schrödinger equation for electron and hole in

Trap properties and formation mechanisms

The energy levels of some of the above traps from experiments are listed in Table 1. To have better understanding of these traps, the electronic properties are simulated with MINDO/3. Cluster approximation to study the electronic structure of several different clusters in silicon oxynitride was used. Atomic relaxation in different charge states of defect was considered in the simulation. To simulate the effect of chemical composition on the capturing properties of the Si2N defect in silicon

An alternative method for oxynitride fabrication

The present oxynitride preparation methods have either drawback of high hydrogen content or low nitrogen content. To overcome these drawbacks, we propose a new method. By re-oxidizing the Si-rich nitride layer, secondary ion mass spectroscopy (SIMS) study reveals that the hydrogen content of nitride film and its interface can be reduced by more than 40%.

Fig. 10 displays the hydrogen profiles of various multi-layer dielectrics. Samples with oxide/oxynitride/oxide structure were fabricated on

Conclusion

The aggressive scaling of the MOS structure has called for new reliability requirement in gate dielectric materials. Oxynitride had been proposed for the reliability improvement in MOS devices and was investigated extensively in recent years. This paper reviews the major issues of dielectric traps in oxynitride based on experimental and MINDO/3 simulation results. The trap centers being discussed include:

  • (a) Paramagnetic defects such as Si, SiOO, Si2N;

  • (b) Diamagnetic defects such as

Acknowledgements

This work is partially supported by research project no. 7001134 of City U.

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