Electrical characterization of the hafnium oxide prepared by direct sputtering of Hf in oxygen with rapid thermal annealing
Introduction
As the thickness of the silicon oxide has already been scaled down to its technological and direct tunneling (<3 nm) limit [1], [2], [3], searching for alternate gate dielectric materials with thicker physical thickness has become one of the major challenges for future 65-nm CMOS technology [2], [3]. Several high dielectric constant (high-κ) materials are being proposed to replace the silicon oxide [3]. Hafnium oxide (HfO2) and zirconium oxide (ZrO2), having potential to form a silicon oxide comparable interface, is considered as one of the potential candidates to replace the silicon gate oxide in future MOS devices [2], [3]. However, it was found that the ZrO2/Si interface is thermally unstable and silicide can be formed at low temperature [4]. HfO2/Si interface is more thermally stable and many investigations on the material properties and applications of HfO2 have been conducted [3], [4], [5], [6], [7], [8], [9], [10], [11], [12]. However, many properties of this gate dielectric material are still unexplored. Several studies reported that the interface trap and oxide trap densities are significantly larger than the conventional thermal oxide [5], [6], [7]. Kim et al. [9] recently studied the time dependent dielectric breakdown (TDDB) of a very thin (∼4.5 nm) HfO2 films and found that the soft and hard breakdown has different statistical distributions. Our recent X-ray photoelectron spectroscopy (XPS) study reveals that the HfO2 film is thermally unstable during post-deposition thermal annealing [11]. Compared to the silicon oxide or silicon oxynitride [1], [2], indeed very little is known about the material and electrical properties of HfO2 film and the HfO2/Si interface. Hence considerable efforts are still indispensable for better understanding of the material properties, the interface structure, and the processing effects.
This work reports the thermal annealing effects, temperature-dependent current–voltage characteristics and the charge trapping properties. The details of sample preparation and electrical characterization will be given in next section and the experimental results will be presented in Section 3. Major emphases are placed on the temperature-dependent current–voltage (I–V) characteristics and the trapping and detrapping behaviors of the oxide traps based on high-frequency capacitance–voltage (C–V) measurements. The effects of post-deposition thermal annealing will also be explored.
Section snippets
Experiments
The starting materials are n-type Si wafers with a resistivity of about 20 Ω cm. The wafers were loaded into the ARC-12M chamber for Hf sputtering immediately after the standard RCA cleaning. Prior to sputtering, the chamber was vacuumed to 10−6 Torr, ionized Ar and oxygen gas (with O2/Ar ratio of 8% or 16%) was then pumped into the chamber. The pressure is maintained at 10−3 Torr during the Hf sputtering and the sputtering power was 120 W. The distance between the substrate and Hf target
Results and discussion
Fig. 1 shows the Fowler–Nordheim (FN) plot of the leakage current behaviors of the Al/HfO2/Si structure as a function of measurement temperature ranging from 325 to 500 K. The hafnium oxide was annealed in oxygen ambient at 700 °C for 10 min. It is noted that the leakage characteristics agree with the FN tunneling model for electric field higher than 2.7 MV/cm and temperature less than 400 K. However, the strong temperature dependencies in this plot cannot be explained with the weak
Conclusions
In summary, we have performed systematic experiments on the electrical characteristics of hafnium oxide (HfO2) gate dielectric films prepared by Hf sputtering in oxygen with rapid thermal annealing. By measuring the current–voltage characteristics at temperature ranging from 300 to 500 K, several abnormal characteristics are recorded. For temperatures below 400 K, the current–voltage characteristics in the high electric field region can be plotted with the Fowler–Nordheim law but a much
Acknowledgements
The work described in this paper was supported by a UGC Competitive Earmarked Research Grant of Hong Kong (Project No: HKUST6174/01E).
References (16)
- et al.
Defects in silicon oxynitride gate dielectric films
Microelectron. Reliab.
(2002) - et al.
Silicon integrated circuit technology from past to future
Microelectron. Reliab.
(2002) - et al.
Chemical vapor deposition and characterization of HfO2 films from organo-hafnium compounds
Thin Solid Films
(1977) - et al.
Ultrathin high-k metal oxide on silicon: processing, characterization and integration issues
Microelectron. Eng.
(2001) - et al.
Modeling of trap-assisted current conduction in thin thermally nitrided oxide films
Solid-State Electron.
(1996) - et al.
High-k gate dielectrics: current status and materials properties considerations
J. Appl. Phys.
(2001) - et al.
Thermodynamic stability of binary oxides in contact with silicon
J. Mater. Res.
(1996) - et al.
Charge trapping in ultrathin hafnium oxide
IEEE Electron Device Lett.
(2002)
Cited by (31)
Electrical stress probing recovery efficiency of 28 nm HK/MG nMOSFETs using decoupled plasma nitridation treatment
2018, VacuumCitation Excerpt :The integrity of deposited gate dielectric with high-k material under different nitrogen concentration and different annealing temperature will be chiefly studied in this work. There is leakage current from the gate through the high-K dielectric layer [14–17] and interfacial layer (IL) to the substrate. The interfacial layer material is silicon oxide (SiOx).
Thickness and temperature dependence of the leakage current in hafnium-based Si SOI MOSFETs
2012, Microelectronics ReliabilityCitation Excerpt :Cartier and Kerber [27] reported linear increase in the SILC at higher temperature due to the generating of new shallow defects in HfO2 layer which are related to the formation of new oxygen vacancy defects in the HfO2 layer of the dual-dielectric stack and the charge trapping in the newly generated shallow defects triggered trap-assisted-tunneling (TAT). Several different mechanisms have been reported as responsible for gate leakage across HfO2 in Si MOS structures, depending on temperature [6,7,4,5,8]. According to Ng et al. [6], the current–voltage characteristics at high fields follow the Fowler–Nordheim (FN) law for temperatures below 400 K, but the TAT is thought to take place at low fields.
Optical and electrical characterization of hafnium oxide deposited by liquid injection atomic layer deposition
2007, Microelectronics ReliabilityStructural, electrical and optical properties of GZO/HfO<inf>2</inf>/GZO transparent MIM capacitors
2006, Materials Science in Semiconductor ProcessingOn the scaling issues and high-κ replacement of ultrathin gate dielectrics for nanoscale MOS transistors
2006, Microelectronic EngineeringCitation Excerpt :It was found that the measured leakage current is several orders of magnitude larger than the theoretical Fowler–Nordheim (FN) curve (see Fig. 44). Large leakage current was also observed in other works [164–166]. Anomaly is further found in the temperature dependence of the current–voltage characteristics [142].