Effects of electrical stress on mid-gap interface trap density and capture cross sections in n-MOSFETs characterized by pulsed interface probing measurements
Introduction
The interface state creation due to electrical stress constitutes a major device reliability concern and attracts much research interest [1], [2]. The charge pumping technique [3], [4], [5], as a reliable characterization method, has been most widely used to measure the densities and capture cross sections of the interface traps generated by electrical stresses [6], [7]. However, in spite of its high sensitivity and simple analytical procedures, this technique has a disadvantage that it is difficult to resolve mid-gap values of the parameters [4]. Mid-gap interface traps are most effective recombination traps and they are either directly responsible for or strongly correlated with a host of performance limiting physical effects in semiconductor devices. So, the characterization of mid-gap traps generated by the electrical stress is indispensable to device development and process monitoring [8]. As an alternative method to characterize the mid-gap interface traps, the gated-diode measurement method has been proposed and widely used [9], [10], [11]. However, when the gated-diode method is applied to monitor the densities of stress-induced mid-gap interface traps, it is somewhat inaccurate, because the variations of the capture cross section value caused by different electrical stresses cannot be considered exactly in this method [11], [12], [13], [14].
We report here the effects of electrical stresses on the mid-gap interface trap density and capture cross section using the pulsed interface probing (PIP) method [15], [16]. In spite of several reports for the PIP characterization of MOSFETs, no work has been reported to date for the investigation of the electrical stress effects on the interface trap densities and cross sections in MOSFETs using this technique. By using the PIP method, we can separately extract the densities and capture cross section parameters of the mid-gap interface trap generated by various electrical stresses. The results are also compared with those of the conventional gated-diode measurement method.
Section snippets
Experimental
The PIP technique used here is identical to that of Cilingiroglu [15]. The gate waveform is implemented using a two-channel pulse generator adopting the specially devised board for the extremely low duty pulses. During measurements, the square wave pulses with various duties are applied to the gate of the MOSFET and the output current is measured at the source–drain tied electrode using a semiconductor parameter analyzer. The magnitude of the reverse biased source–drain voltage is fixed to 0.5
Results and discussion
Fig. 1(a) shows the representative PIP characterization curve measured on a MOSFET prior to the stress, where A is the gate area, kT is the thermal energy, and ΔIS is the difference between ISS and ISP. The generic pulse waveform is illustrated as an insert in Fig. 1(a). From Fig. 1(a), it can be seen that the values of (TD/AqkT)ΔIS tend to saturate as the depletion time increases. The mid-gap interface trap density Dit0 was obtained from this saturated value using the following equation [15].
Conclusion
In this work, the PIP method has been used to characterize the mid-gap interface trap density and the mean capture cross section in n-MOSFETs following the high field F–N stresses. From the results, the decrease of the mid-gap trap capture cross section values (σ0) and the increase of the mid-gap trap densities (Dit0) were found after stresses. These results are consistent with the earlier observation about the band-gap averaged trap parameters using the charge pumping method. As the decrease
References (18)
- et al.
Extraction of the lateral distribution of interface traps in MOSFETs by a novel combined gated-diode technique
Microelectron. Reliab.
(2001) - et al.
A study of interface trap generation by Fowler–Nordheim and substrate-hot-carrier stresses for 4-nm thick gate oxides
IEEE Trans. Electron Dev.
(1999) - et al.
Fowler–Nordheim stressing of polycrystalline Si oxide Si structures: Observation of stress induced defects in the oxide, oxide/Si interface, and in bulk silicon
J. Vac. Sci. Technol. A
(1997) - et al.
Charge pumping in MOS devices
IEEE Trans. Electron Dev.
(1969) - et al.
A reliable approach to charge pumping measurements in MOS transistors
IEEE Trans. Electron Dev.
(1984) - et al.
Determination of interface trap capture cross sections using three-level charge pumping
IEEE Trans. Electron Dev. Lett.
(1990) - Uchida H, Inomota S, Ajioka T. Effects of interface traps and bulk traps in SiO2 on hot-carrier-induced degradation....
- et al.
Effects of Fowler–Nordheim stress on interface trap density and emission cross sections in n-MOSFET’s studied by three-level charge pumping
IEEE Trans. Electron Dev. Lett.
(1996) Physics and technology of semiconductor devices
(1967)