Dynamic multicast routing in VLSI
Introduction
In the early days of network communications, point-to-point communication was enough to carry out the existing applications. However when new generation applications that require multipoint (or group) communication such as multimedia conferences, shared workspace, distributed games and distributed simulation came into the picture, there became a pressing need for enhanced communication protocol. These applications involve more than two users who wish to exchange information.
The importance of multipoint communication and more potential applications that employ multipoint communication are being discovered. It is of no wonder that a great deal of active research has been done in this area over the years. However, providing network support for multipoint communication is not a straightforward task mainly due to the various challenges and problems that arise when compared to the traditional point-to-point communication [2]. One of the most challenging issues researched in network support of multipoint communication is multicast routing.
The term “multicast” is often used to denote point-to-multipoint communication. Thus, multicast routing can be defined as a routing process from a given source node to multiple destination nodes, where the source node and destination nodes represent the participants of a multipoint communication.
Designing multicast routing algorithms is a complex problem, as issues pertaining to faulty links/nodes and group membership changes that occur in a single session must be dealt with. Some of the technical challenges that have been reported in Ref. [4] are given below.
Minimise network load: Two sub-problems arise in the problem of optimising network resources. They are to avoid both loops and traffic concentration on a link or a sub-network.
Provide reliable transmission: Link or node failures occurring during a multipoint session should not cause any side effects in the transmission of data to the destination nodes. This is because the response time is very important in multicast sessions and any increase in transmission delay or decrease in resource availability cannot be tolerated. The routing process should be capable of computing routing decisions fast in an emergency.
Determining optimal routes: The routing algorithm should be able to determine optimal routes by taking into consideration of different cost functions, including available resources, bandwidth, number of links, node connectivity, price to be paid, and end-to-end delay.
In this paper, we propose a VLSI efficient technique for multicast routing. Our technique is compared with the most widely used routing technique to show that it is superior and lends well for hardware realisation.
Section snippets
Multicast routing algorithms
A number of basic algorithms are employed in multicast routing, the simplest being the flooding method. However, this method is inefficient in terms of link utilisation. The most popular type of routing algorithm is one that generates a multicast tree. There are several multicast routing algorithms that construct the multicast trees. Among these, Steiner tree is the most popular. The Steiner algorithm designs a tree that spans the group of members with the minimal cost, according to a distance
The “clustering technique”
A possible solution to reduce the execution time is to implement the multicast algorithms in hardware so that it is capable of addressing requirements outlined in Section 1. Although there have been a number of attempts to parallelise the Dijkstra's shortest path algorithm, we are not aware of any hardware implementation of it [7].
We propose a routing strategy for real-time multicasting applications that is based on the “clustering technique”. The “clustering technique” was previously proposed
Architecture for routing engine
The “clustering technique” can be implemented in VLSI (Very Large Scale Integration) and it is capable of computing high-speed routing decisions. In this section, we will describe the routing strategy and propose a suitable architecture for multicast routing based on the “clustering technique”.
Simulation results
The Cluster Unit developed in VHDL was functionally simulated on SpeedWave (ViewLogic VHDL 1076 VHDL simulator) with a clock period of 100 ns and the performance was evaluated against a software implementation of the equivalent clustering operations [9]. It should be noted that the developed Cluster Unit can accommodate a network size of only sixteen nodes and timing evaluation for larger number of nodes were projected based on the timing of independent operations of the clustering process as
Conclusion
A VLSI efficient unit for multicast routing has been proposed. The proposed hardware unit uses the “clustering technique” as the routing strategy, which relies on eliminating all the cycles in the network using logical ‘AND’ and ‘OR’ operations. It has been shown that the VHDL implementation of the clustering unit results in a significant improvement in performance over the software alternative. The increase in the size of the network and degree of cycles result in a linear increase in the
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