An evolutionary simulation–optimization approach in solving parallel-machine scheduling problems – A case study

Abstract

Parallel-machine scheduling research is one of the active fields in the past decade due to its increasing application. Due to the problem complexity, it is a general practice to find an appropriate heuristic rather than an optimal solution for the parallel-machine scheduling problem. The wirebonding workstation is the bottleneck in integrated-circuit packaging manufacturing. Effective scheduling is one of the key factors towards improving the efficiency of the wirebonding operations. The wirebonding scheduling problem is an equal (or identical) parallel-machine scheduling problem. The research solved the wirebonding scheduling problem by using an evolutionary simulation–optimization approach. Empirical results, benchmarked against lower bound solutions, showed the quality solutions of less than 2% deviation for a wide range of production scenarios. However, if the problem size were to increase, the proposed methodology might become computationally prohibitive, and this might well require further development if used to solve the identified problem in such circumstances.

Introduction

The manufacture of an integrated-circuit (IC) has three major stages: (i) wafer manufacturing; (ii) wafer processing; and (iii) packaging and final test. In the first stage, wafer is manufactured from high-purity molten silicon. The wafer-processing stage then achieves full integration of the original circuit design onto a die on a wafer, as illustrated in Fig. 1 (Yang & Tseng, 2002). The third stage is discussed in more details as follows since one of its operations is adopted as the case study.

Each die in Fig. 1 represents an individual circuit chip. A finished wafer usually contains 100 to 200 dies, depending on the size of the wafer and the size of the die. A circuit chip must be sealed for mechanical and environmental protection. IC packaging processing separates a die from the wafer, which is then put on a lead frame for a connecting circuit and an application device, as illustrated in Fig. 2(a). Gold wires connect the IC die and the leadframe, as shown in Fig. 2(b). The number of wires required for a specific device usually ranges from ten to thirty. Some sophisticated devices might require more wires. Because the wirebonding process is both time-consuming and cost-effective, it usually has a large number of parallel bonding machines (ranging from tens to hundreds), and it usually represents the bottleneck stage in the IC packaging process. After the wirebonding step, the chip is then encapsulated with plastic, as illustrated in Fig. 2(c). Finally, the chip is separated from the lead frame, and is then tested for its required functions.

Because the wirebonding workstation is usually the bottleneck in IC-packaging manufacturing, it should be the focus of efforts to improve productivity (Gilland, 2002, Harman, 1997, Tovia et al., 2004). An effective scheduling decision is one of the key factors towards improving the efficiency of the wirebonding operations, particularly, for the instance of multiple products. Fig. 3 illustrates the wirebonding system configuration.

In Fig. 3, the jobs waiting for scheduling are accumulated in the workstation buffer. The unit load is a “lot”. For each machine, there is a built-in machine buffer holding up to two lots that will be automatically loaded onto a machine. The operator usually keeps at least one lot in the machine buffer to avoid machine starvation. The wirebonding operations have the following properties:

• There is a sequence-dependent setup time;

• It is a dynamic system;

• The machine failures need to be considered;

• It may be proportional parallel-machine case. Its variance is not significant, and hence is assumed to be equal parallel machines.

The wirebonding scheduling problem is a parallel-machine scheduling problem. One of the common objectives studied in this area is the minimization of makespan. Particularly, the proposed case is primarily a make-to-order (MTO) system that puts more emphasis on the makespan performance. The proposed wirebonding scheduling problem solves a short planning horizon such as a daily scheduling plan. Its part arrival rate is dependent on the departure rate of its previous workstation and therefore it is a dynamic arrival case. The remaining work-in-process (WIP) from previous day is in front of the machine buffer. It is the objective of the present study to minimize the makespan for the wirebonding scheduling problem.

An evolutionary simulation–optimization approach is proposed to solve the proposed parallel-machine scheduling problem. It uses discrete-event simulation as the tool to model the problem. Discrete-event simulation can model non-linear and stochastic problems and allow examination of the likely behavior of a proposed manufacturing system under selected conditions. It can take into account many details and constraints in evaluating the performance of a system. However, it does not provide a method for optimization. It is difficult to use an exhaustive search approach to find the optimal solution when there is a large set of parameters with many possible values (Yang & Tseng, 2002). Therefore, in seeking a solution, it is necessary to use “simulation–optimization” methods (Paris & Pierreval, 2001). The present study adopts evolutionary algorithms (EA) as the search mechanism for the proposed simulation–optimization method.

The remainder of this paper is organized as follows. Section 2 presents the literature review. Section 3 provides a detailed discussion for the proposed methodology. Empirical results are shown as Section 4. Conclusions and future research are contained in Section 5.