Elsevier

Computers & Electrical Engineering

Volume 71, October 2018, Pages 151-161
Computers & Electrical Engineering

Spectrum sensing with a parallel algorithm for cyclostationary feature extraction

https://doi.org/10.1016/j.compeleceng.2018.07.016Get rights and content

Abstract

The current static management policy for spectrum allocation has shown to be inefficient when dealing with the increasing demand for wireless communication systems. More recently, opportunistic spectrum access has emerged as a promising alternative that allows non-licensed users to utilize the spectrum if no primary users are detected. Spectrum sensing based on cyclostationary feature detection can be employed to reliably identify the presence of primary users even at low SNR levels. However, the detection of modulated signals at lower SNR levels demands a higher number of analyzed samples. In this paper, we propose an architecture for spectrum sensing that enables the reduction of the computational time needed to obtain cyclostationary features of a signal when using multi-core processors. Simulation results show that the proposed architecture can achieve over 92.8% parallel efficiency, which leads to a reduction of spectrum sensing time by a factor of 29.7.

Introduction

The increasing demand for higher data rates and the emergence of wireless technologies combined with the fixed spectrum assignment policy are leading to the apparent spectrum scarcity at frequency bands that could be more economically used for wireless communications. In fact, some empirical studies [1] have shown the underutilization of some frequency bands in the temporal and spatial dimensions. To increase the spectral efficiency, the promising technology of cognitive radio enables the opportunistic spectrum access by secondary users. That is, unlicensed (secondary) users are allowed to utilize the spectrum when the licensed (primary) user is absent. As a result of its potential, cognitive radio has been proposed as a critical technology in several areas, such as aeronautical communications [2], vehicular networks [3], drone networks [4], Internet of Things [5], and 5G networks [6].

Usually, opportunistic spectrum access employs the listen-before-talk strategy, i.e., secondary users are required to perform spectrum sensing to detect the presence of the primary user before each transmission. For this reason, spectrum sensing is the most critical aspect of cognitive radios [7]. Additionally, there is a trade-off involved: the reliability of the detection demands a longer sensing time, which in turn reduces the transmission time. Therefore, one of the most significant challenges of spectrum sensing techniques is to minimize interference to the primary users and to detect transmission opportunities with both high accuracy and fast detection time [8].

The most common spectrum sensing techniques are the matched filter, energy detection, and cyclostationary feature detection [9]. A matched filter is based on the correlation performed between the unknown signal and a filter whose impulse response is a mirror image and a time-shifted version of a reference signal. This technique maximizes the signal-to-noise ratio (SNR) for a signal buried in additive noise, but it is only useful when the secondary users have prior knowledge of the primary user’s signal, a constraint usually impractical in cognitive radio networks. On the other hand, energy detection does not need previous knowledge of the primary user’s signal, has low complexity, and is easy to implement, which makes it widely used. However, its detection threshold is derived from the noise variance, a value that is hardly known at a particular time and without this information the performance may be dramatically reduced [5]. This method also suffers from SNR wall phenomenon, i.e., below some SNR level, even if the sensing time is increased indefinitely, it is impossible to reliably detect a signal [10].

Cyclostationary feature detection is one of the most reliable methods of spectrum sensing at low SNR levels and, unlike energy detection, is not affected by noise uncertainty or SNR wall [10]. It exploits the fact that communication signals exhibit statistical moments that vary periodically with time, e.g., mean and autocorrelation functions. These periodical patterns (also known as features) cannot be found in stationary noise, since they are due to operations typical of communication signals, such as modulation, sampling, multiplexing, and coding [11]. Also, cyclostationary feature detection can be employed to obtain additional information about the analyzed signal that would be impracticable with energy detection, e.g., it can discriminate different types of primary user or secondary user signals and also identify individual air interfaces [12].

Recent works demonstrate the application of cyclostationarity in several contexts of spectrum sensing, such as detection of digital video broadcasting-terrestrial (DVB-T) signals [13]; long term evolution (LTE) and long term evolution - advanced (LTE-Advanced) networks [14]; multiple input multiple output - orthogonal frequency division multiplexed (MIMO-OFDM) based cognitive radio system [15]; satellite communications [16]; and single-carrier frequency-division multiple access (SC-FDMA) systems [17]. Additionally, cyclostationary functions were implemented in hardware, such as an application-specific integrated circuit (ASIC) [18] and field programmable gate array (FPGA) [13]. Although very robust, cyclostationary feature detection has a computational cost higher than energy detection. Nowadays, this problem can be tackled by the massive processing power offered by multi-core processors.

Historically, increasing the clock frequency has been a straightforward method to increase the performance of single-core processors. However, the approach of developing a single core with higher clock speeds also increase the power dissipated and, consequently, the complexity of the cooling systems design. From 2010, this approach reached the highest possible clock frequency feasible with the contemporary silicon electronics [19]. As a result of these limitations, multi-core architectures have been established as a dominant trend in computing systems. These architectures consist of multiple processing cores that run at a lower frequency clock and are integrated into the same chip. Consequently, multi-core processors have shown to be a viable strategy to overcome computational time requirements of applications with a significant concurrency degree and also to reduce the power consumption [20], [21]. In fact, multi-core processors may be the best solution, e.g., to process high data rate and delay-bound services in the millimeter-wave (mmWave) frequency bands for 5G cellular communications [22].

In cognitive radio networks, secondary users should be agile and have robust recognition of the presence or absence of the primary user with acceptable delay and detection error rate. That is, secondary users are required to avoid interference on the primary user and thus have to detect the presence of the primary user as quickly as possible. On the other hand, fast detection of opportunities of transmission (the absence of the primary user) is a crucial factor to improve the overall throughput of cognitive radio networks. To summarize, enhance the current sensing approaches to provide near-optimum accuracy and reasonable sensing time is an open challenge for cognitive radio networks [23].

In this work, we present an architecture for spectrum sensing using a parallel algorithm for cyclostationary feature detection. The proposed algorithm enables the reduction of processing time when extracting cyclostationary features using multi-core processors. We evaluate the performance of the proposed architecture using the parallel speedup and the parallel efficiency. A speedup of Sp=29.7 was obtained when using L=4000 blocks with size N=512 for p=32 processing cores, which represents a parallel efficiency of Ep=92.8%.

Also, the performance of cyclostationary feature detection was determined regarding the probability of detection (PD) of a primary user, varying the SNR levels and considering a constant probability of false alarm of PF=10%. The values of PD and PF obtained according to the SNR and number of samples were plotted in the Receiver Operating Characteristics (ROC) curves. The detection rate of Binary Phase Shift Keying (BPSK) and Quaternary Phase Shift Keying (QPSK) modulated signals reached a PD ≥ 90% starting from SNR=24 dB and SNR=21 dB, i.e., at an SNR level far below the theoretical limit of energy detection (SNR wall is 3.3 dB).

The rest of this paper is organized as follows. Section 2 presents the primary functions applied to cyclostationary feature extraction. Section 3 describes our parallel algorithm to extract cyclostationary features. Section 4 proposes an efficient architecture to perform spectrum sensing. The results are presented in Section 5. Finally, Section 6 concludes this paper.

Section snippets

Cyclostationarity theory

During the processing of a communication signal, operations such as sampling, filtering, and coding, give rise to a signal that can be modeled as second-order cyclostationary process. That is, the resultant modulated signal exhibits periodicity in its mean and autocorrelation function [11].

While stationary signals are usually analyzed by the autocorrelation function and the power spectral density, the cyclostationary signals are analyzed by the generalization of these functions, called Cyclic

Parallel feature extraction algorithm

The SCD can be estimated from the time-smoothed cyclic cross-periodogramS^Xα[k]=1Ll=0L1Xl[k+α2]Xl*[kα2],where Xl[k]=n=0N1x[n]exp(j2πnk/N) is the discrete Fourier transform of the signal x[n] for each one of the L blocks of length N.

The Parallel Cyclic Periodogram Detection (PCPD) algorithm [20] was developed using OpenMP, a high-level API for parallel programming multi-core processors. This parallel algorithm enables the reduction of processing time when extracting cyclostationary

Proposed architecture for spectrum sensing

The spectrum sensing problem can be seen as a binary hypothesis test, which evaluates the hypothesis of absence of the primary user on the channel. If the null hypothesis H0 is accepted, the analyzed samples are considered to be composed only of noise. Consequently, the hypothesis H0 states that the channel is vacant and there is a transmission opportunity for secondary users. In turn, if the null hypothesis is rejected (hypothesis H1), the channel is considered in use by the primary user.

This

Parallel algorithm

The performance of the proposed parallel algorithm was evaluated by two metrics: the parallel speedup (Sp) and the parallel efficiency (Ep) for p processing cores. The parallel speedup measures the performance gain of parallel processing when compared to serial processing, i.e.,Sp=T1Tp,where T1 represents the execution time using one core and Tp the execution time using p processing cores. In this paper, speedup indicates the reduction in response time due to parallelism when computing

Conclusions

This work proposed an architecture for spectrum sensing using a parallel algorithm for estimation of cyclostationary features of modulated signals. Our results show the efficiency of the proposed architecture, enabling the reduction of processing time when extracting cyclostationary features for use in spectrum sensing. This time saved due to parallel computing can be used to increase the throughput of cognitive radio networks and enables the reduction of the duration of interference to the

Acknowledgements

This research was supported by the High-Performance Computing Center at UFRN (NPAD/UFRN).

This research did not receive any specific grant from funding agencies in the public, commercial, or not-for-profit sectors.

Arthur D. L. Lima is currently pursuing his Ph.D. in Electrical and Computer Engineering at Federal University of Rio Grande do Norte (UFRN), Natal, Brazil. His research interests include cognitive radio, statistical signal processing, cyclostationary analysis, parallel computing, and wireless communications.

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    Arthur D. L. Lima is currently pursuing his Ph.D. in Electrical and Computer Engineering at Federal University of Rio Grande do Norte (UFRN), Natal, Brazil. His research interests include cognitive radio, statistical signal processing, cyclostationary analysis, parallel computing, and wireless communications.

    Luiz F. Q. Silveira received his Bachelor Degree in Electrical Engineering from Universidade Federal da Paraíba (UFPB), Brazil, 2000, his Master Degree (2002) and Ph.D. (2006) in Electrical Engineering, from Universidade Federal de Campina Grande (UFCG), Brazil. Since 2010, he is Professor at the Department of Computing Engineering and Automation of the Universidade Federal do Rio Grande do Norte (UFRN), Brazil.

    Samuel Xavier-de-Souza is Computer Engineer by UFRN, Brazil, and Doctor in Electrical Engineering by KULeuven, Belgium; He worked for IMEC, Belgium, as Software/Hardware Engineer, and for Flemish Supercomputing Center, Belgium, as High-Performance Computing Consultant. He is currently Associate Professor at UFRN and Royal Society-Newton Advanced Fellow. He is founder and chief coordinator of the High-Performance Computing Center-NPAD at UFRN.

    Reviews processed and recommended for publication to the Editor-in-Chief by Area Editor Dr. E. Cabal-Yepez.

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