A method of implanting combinational hardware Trojan based on evolvable hardware

https://doi.org/10.1016/j.compeleceng.2021.107229Get rights and content

Highlights

  • Compared with the general method, it is not to add hardware Trojan, but to modify the original circuit to generate Trojan function.

  • The hardware Trojan designed by EHW has little effect on the number of the logic gates and power consumption of the original circuit, and has good concealment.

  • According to the symmetric value and similar value to evaluate the difficulty of evolution, choose the hardware Trojan that is easy to evolve.

Abstract

In order to reduce the impact of Hardware Trojan (HT) implantation on the original circuit power consumption, a method using Evolvable Hardware (EHW) to implant combinational HT is proposed. First, the truth table of the original circuit is modified according to the category of HT. Secondly, the symmetric value and similar value are used to evaluate the difficulty degree of evolution, and the truth table which is easy to evolve is selected for evolution. Finally, from the various circuits generated by evolution, the circuit close to the number of logic gates and power consumption of the original circuit is selected to replace the original circuit. The obtained circuit not only includes the HT function, but also improve the anti-power detection ability. According to the experimental results, the HT implanted by EHW has smaller power consumption difference than the HT implanted by general method, and has stronger anti-power detection ability.

Introduction

With the rapid development of electronic technology, integrated circuit (IC) is widely used in every aspects of life, and its security is very important. However, the production process of IC is not safe, which may be implanted into Hardware Trojan (HT), resulting in abnormal circuit function [1], [2], [3], seriously affecting people's normal production and life. Therefore, in recent years, the HT detection has gradually become a research hotspot, such as side-channel analysis (power consumption analysis [4], [5], [6], electromagnetic analysis [7,8],), optical analysis [9,10], logic testing [11], [12], [13]. But these technologies are still in the initial stage and are not perfect. Mainly because real HT exists the situation of sampling difficulty, less varied categories and so on. In order to provide research objects for detection technology, many people have designed HT:

In 2016, Yang et al. [14] constructed a circuit, using a capacitor to absorb the charge during digital conversion in the wire. When the capacitor is fully charged, an attack is launched, forcing the victim's trigger to change to the value the attacker needs.

In 2017, Sepulveda et al. [15] designed an improved "prime + probe" cache attack to attack the 128-bit Advanced Encryption Standard (AES). This design uses bus communication for the first time to improve its efficiency.

In 2019, Yang et al. [16] designed an ordinary HT, which can attack the key based on bit string technology with only one trigger. The purpose is to warn the password designer that it needs to consider the hardware security when designing passwords.

From the above several HT design methods, we can see that they are basically based on functional design, supplemented by hidden design. There is a common problem: additional HT circuit causes power consumption change and anti-detection ability becoming not high. In order to solve this problem, this paper proposes a method of implanting the combinational HT [17] with EHW technology. The original circuit is redesigned to increase the HT function, while keeping the changes of logic gate number and power consumption as small as possible, so as to improve the ability of anti-power detection and provide more hidden HT for detection technology.

The rest of the paper is organized as follows. In Section 2 we analyse the general method, power consumption and EHW technology. In Section 3 we design the steps of implanting HT with EHW technology. In Section 4, the strategy of modifying the truth table is proposed and verified in Section 5. Section 6 verifies the effectiveness of the proposed method by using experiments. Section 7 summarizes the full text and points out the next research direction.

Section snippets

General method

The general implantation method of combinational HT is shown in reference [18]. HT is composed of trigger part and load part. Trigger part selects several nodes from the circuit as input, and activates the load part when the input is specific signal. The general implantation method does not change the original circuit, but adds additional HT circuit. The number of logic gates will increase correspondingly, which leads to a large change of power consumption and weak anti-power detection ability.

Power consumption analysis

Implantation steps

According to their impact on the function of the original circuit, HT are divided into two categories, bug-based HT and parasite-based HT [23]. The bug-based HT is to change the original circuit function, that some functions of the original circuit are abnormal. Whereas the parasite-based HT is not to change the original circuit function, but to add additional HT function, which is activated when a specific combination logic appears in the circuit.

As the function changes, so does the truth

Modification strategy

In Fig. 2, when the result of evolution or calculation does not meet the requirements, it is necessary to modify the truth table again and repeat evolution and calculation again. However, the time required for evolution and simulation is long, the total time will increase too much and the efficiency will be greatly reduced. Therefore, a strategy is proposed to modify truth table.

The difficulty degree of evolution is very different when the different location of original truth table is changed.

Verification experiment

In order to verify accuracy of the evaluation method of truth table, this paper carries out verification experiments on the symmetric value SY and the number of logical gates G.

There are 256 kinds of truth tables with 3-input and 1-output and 65,536 kinds of truth tables with 4-input and 1-output. All these truth tables are evolved in three different sizes of arrays (R is row, and C is column). Each node has 7 logical gate types (NOT, OR, AND, XOR, NOR, NAND, XNOR) to choose from, and 2 × 107

Experimental configuration

In EHW evolution, 1-bit full adder, 2-bit multiplier and 2-bit adder are commonly used for experiments.Two categories of HT, bug-based HT and parasite-based HT, are implanted respectively, and the experiments are compared with the general method.

The 1-bit full adder is a 3-input and 2-output circuit, and the size of truth table is 8 × 3. The two-bit multiplier is a 4-input and 4-output circuit, and the size of truth table is 16 × 4; The 2 -bit adder is a 4-input 3-output circuit, and the size

Conclusion

In view of the fact that there are more logic gates and more power consumption changes in the general method of implanting HT, this paper proposes to use EHW technology to implant more hidden combinational HT. The basic idea is to use EHW technology to redesign the original circuit, modify the original truth table, add HT function, keep the number of logic gates and power consumption close to the original circuit as far as possible, and improve the anti-power detection ability of HT. Because

CRediT authorship contribution statement

Lijun Liu: Conceptualization, Data curation, Formal analysis, Writing - original draft. Tao Wang: Funding acquisition, Project administration, Resources, Supervision. Xiaohan Wang: Investigation, Software, Methodology, Writing - review & editing. Tianyu He: Validation, Visualization.

Declaration of Competing Interest

No conflict of interest exits in the submission of this manuscript, and manuscript is approved by all authors for publication. I would like to declare on behalf of my co-authors that the work described was original research that has not been published previously, and not under consideration for publication elsewhere, in whole or in part. All the authors listed have approved the manuscript that is enclosed.

Lijun Liu is a masters student at Army Engineering University (Shijiazhuang Campus).He has been working on the research of hardware Trojan implantation method based on EHW.

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  • Lijun Liu is a masters student at Army Engineering University (Shijiazhuang Campus).He has been working on the research of hardware Trojan implantation method based on EHW.

    Tao Wang is a professor at Army Engineering University (Shijiazhuang Campus).His main research fields are information security and cryptography.

    Xiaohan Wang is a PhD student at Army Engineering University (Shijiazhuang Campus).His main research content are hardware Trojan detection and side-channel analysis.

    Tianyu He is a teacher at NCO School of the artillery and Air defense Academy. His main research field is studies applied mathematics.

    This paper is for regular issues of CAEE. Reviews processed and recommended for publication by Area Editor Dr. G. Martinez Perez.

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