Versatile energy recovery circuit for driving AC plasma display panel with single sustain circuit board
Introduction
The power consumption of an AC plasma display panel (AC PDP) occurs mostly in the sustain discharges. The major current supplied to the PDP for sustain discharge is a displacement current because two sustain electrodes, the scan (S) and common (C) electrodes, are separated from the discharge gap by an insulator. Accordingly, the PDP has been modeled with a capacitor Cp to analyze behavior of sustain drive circuits [1], [2]. The simplest full-bridge type of sustain drive circuit is shown in Fig. 1 [3]. It consists of four MOSFET switches only, and its operation consists of three switching states: the SUS_UP_S, SUS_DN, and SUS_UP_C states. The SUS_UP_S and SUS_UP_C states generate the sustain pulses for S and C, respectively. When the circuit is driven at a voltage of Vsus, each sustain pulse charges up the panel with an energy of . The same amount of energy is dissipated in the circuit to charge the panel. At the SUS_DN state, the stored energy is dumped to the ground and the voltages of S and C return to 0 V. Accordingly, the amount of energy dissipated for each pulse is . If the number of sustain pulses per second is f, the power consumption is , which becomes intolerable for a practical AC PDP. Furthermore, high charging and discharging currents cause electromagnetic interference (EMI) and circuit heating problems. To relieve these problems, an energy recovery (ER) circuit has been added to the full-bridge sustain circuit.
To recover the energy stored in the panel, all existing ER circuits use either a series or parallel resonance between the panel capacitance Cp and an energy recovery inductor. Two typical circuit configurations of the ER circuit are shown in Fig. 2, Fig. 3. The series resonance ER circuit shown in Fig. 2 was invented by Weber and adopted by many PDP manufacturers [4], [5]. It uses two separate ER circuits for S and C. The energy storage capacitors Css and Ccs are charged initially to a voltage of Vsus/2. Sustain pulses are generated using seven switching states: the ER_UP_S, SUS_UP_S, ER_DN_S, ER_UP_C, SUS_UP_C, ER_DN_C, and SUS_DN states. The initial state is the SUS_DN state at which the voltages Vc of the C electrode and Vs of the S electrode are at 0 V. The switch S2 remains closed to keep Vc = 0 V, while generating a sustain pulse for S. At the ER_UP_S state, the inductor Ls and the panel capacitor Cp form a series resonance circuit and the energy stored in Css are supplied to Cp. The voltage Vs of the S electrode reaches Vsus at one half of the resonance period. The SUS_UP_S state starting at t = t1 holds Vs at Vsus. At the ER_DN_S state starting at t = t2, Ls and Cp forms a series resonance circuit and Vs decreases to 0 V at one half of the resonance period. The energy stored in Cp is recovered to the energy storage capacitor Css. After all stored energy is recovered, the SUS_DN state starts to hold Vs at 0 V. The subsequent sustain pulse for C is generated using the ER_UP_C, SUS_UP_C, ER_DN_C, and SUS_DN switching states on the energy recovery circuit for C, which operates in the same way as the circuit for S. The circuit shown in Fig. 2 has the advantage of flexible sustain waveform design at the expense of cost because it uses two separate ER circuits.
The parallel resonance ER circuit shown in Fig. 3 was invented by Sakai [6], [7]. This circuit uses a parallel LC resonance between Cp and L. The sustain pulses are generated using the SUS_DN, SUS_UP_S, TRANS_A, SUS_UP_C, and TRANS_B states. At the SUS_DN state, both Vs and Vc are at 0 V. The SUS_UP_S state sets Vs = Vsus and Vc = 0 V. The first sustain pulse for S is generated using the SUS_UP_S state starting at t = t0. Next, the TRANS_A state starting at t = t1 forms a parallel resonance circuit consisting of Cp and L, and Vs decreases to 0 V at one half of the resonance period, while Vc increases to Vsus. The SUS_UP_C state begins at t = t2 after Vc reaches Vsus and maintains the voltages Vc = Vsus and Vs = 0 V. At t = t3, the TRANS_B state starts and Vc decreases to 0 V, while Vs increases to Vsus. The sequence of SUS_UP_S, TRANS_A, SUS_UP_C, and TRANS_B is repeated until the last sustain pulse. The last sustain pulse is generated using a sequence of TRANS_A, SUS_UP_C, and SUS_DN states. When compared with the ER circuit shown in Fig. 2, the number of circuit elements required in this circuit is significantly reduced. However, because the energy stored in one electrode is being used to charge up the other, the transitions of voltages for S and C occur simultaneously and it is impossible to adjust the separation between the sustain pulses. Also, a hard switching is unavoidable for the first and last sustain pulses, resulting in an EMI problem and an increase in power dissipation.
The challenging factors in designing the ER circuit have been a reduction of circuit cost and an increase of power efficiency, while increasing the degree of freedom in tuning the sustain waveform. This paper proposes an energy recovery circuit which can recover energy from both the S and C electrodes using a single sustain circuit board. The proposed circuit has high power efficiency and good flexibility in tuning the sustain waveform. The operational principle of the proposed circuit is given in Section 2 and experimental results are given in Section 3. A conclusion is given in Section 4.
Section snippets
Proposed energy recovery circuit
To overcome the disadvantages of the series and parallel resonance ER circuits, we propose the energy recovery circuit shown in Fig. 4. This circuit consists of a full-bridge circuit composed of S1–S4, one energy storage capacitor Cs, two energy recovery inductors L1 and L2, three insulated-gate bipolar transistors (IGBTs) S5–S7, and three protection diodes D1–D3. It can operate either in a series or in a parallel resonance mode. The sustain pulses are generated using the following nine
Experimental results and discussion
The proposed circuit was implemented using the following components: IRF 740 FETs from International Rectifier Co. Ltd for the switches S1–S4, FSGH80N60 IGBTs from Fairchild Semiconductor Co. Ltd for the switches S5–S7, SF20L60U diodes from Shindengen Electric Co. Ltd for the protection diodes D1–D3, and two air core inductors L1 and L2. The IGBT switch has a built-in fast recovery diode. The capacitance Cs was 47 μF. The inductances L1 and L2 were 0.3 μH. The panel capacitance Cp was 0.1 μF.
The
Conclusion
An energy recovery circuit which can operate either in a series or a parallel resonance mode and can drive an AC PDP with single sustain circuit board, is proposed. It consists of one energy storage capacitor, two energy recovery inductors, and three insulated-gate bipolar transistors. The circuit operations in the series and parallel resonance modes are similar to the conventional ones, except for the leading edge of the first, and the trailing edge of the last sustain pulses in the parallel
Acknowledgements
This work was supported by LG Electronics Inc. and the Korean Ministry of Education under the BK21 program.
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