Elsevier

Digital Signal Processing

Volume 55, August 2016, Pages 64-77
Digital Signal Processing

A digital multichannel neural signal processing system using compressed sensing

https://doi.org/10.1016/j.dsp.2016.04.013Get rights and content

Highlights

  • We build a 256-channel digital signal processing system using CS technique.

  • We discuss circuit implementation based on the MDC matrix for signal compression.

  • Distance in circuit design is chosen as 4 or 5 and channel-to-scan is chosen as 4.

  • Our system has relatively low power consumption and a small area.

  • Reconstruction accuracy is good with a large compression rate using our system.

Abstract

This paper concerns a wireless multichannel neural recording system using a compressed sensing technique to compress the recorded data. We put forth a single and a multichannel system applying a Minimum Euclidean or Manhattan Distance Cluster-based (MDC) deterministic compressed sensing matrix. The single-channel signal processing system is composed of spike detection and data compression blocks. For the construction of the MDC matrix, the distance σ is an important parameter, which can take a value of 4 or 5. In addition, the sharing strategy is used to construct a multichannel system, and we analyze the influence of the number of the channels; scan rate on the reconstruction error, compression rate and power consumption; the influence of the signal-to-noise ratio; and reconstruction performance on neural signals. Based on the results, a 256-channel digital signal processing system, implemented in a 130-nm CMOS process, is proposed. This system has power consumption per channel of 12.5 μW and silicon area per channel of 0.03 mm2, and provides data reduction of around 90% while enabling accurate reconstruction of the original signals.

Introduction

Wireless monitoring of neural activity through implantable devices is an important technology that enables advanced diagnosis and treatment of brain disorders such as Parkinson's disease, major depressive disorder and epilepsy [1], [2], [3]. Fig. 1 shows a typical wireless neural recording system. However, designing such a wireless neural recording device faces numerous challenges. These include integrating high-density recording electrodes [4], [5], avoiding the heating of tissues due to energy transfer to power the implants (the maximum power density should be 0.8 mW/mm2 for the exposed tissue area [6]), maximizing the device lifetime [7], [8], and minimizing the device size [9]. The conflict between huge data size and limited energy available for implantable recording devices is one of the principal challenges; specifically, integrating the necessary wireless transmission component in an implantable device exacerbates the problem of stringent energy constraints [10]. Therefore, data reduction or compression strategies should be employed to minimize the power consumption of the dedicated implantable devices.

Several neural signal reduction or compression techniques are already in use. Signal reduction is widely used to implement data reduction under certain constraints; methods include neural spike detection [11], [12], [13] and data feature extraction [14], [15]. Both methods involve locating important information and eliminating the remaining parts of the signals. However, signal reduction methods distort or lose some necessary information. For instance, a spike-detection-based neural recording device usually obtains data as the time series or the impulse, which cannot provide the details (shape or amplitude) of the original signal or spikes [16]; feature extraction methods are usually computationally complex, which conflicts with the design of a low-power device [17]. Therefore, it is necessary to find a new method that does not cause significant loss of features when recording neural signals.

Data compression methods avoid these drawbacks by preserving maximum information during the compression phase, which allows recovery of the original signal. Recently introduced compressed sensing (CS) technique shows great potential in compressing neural signals [18]. CS has low-encoder complexity and universality for different kinds of signals. It is a revolution for the traditional Nyquist sampling frequency (Shannon theory), which has attracted considerable attention in the areas of computer science, applied mathematics and electrical engineering [19]. CS preserves the temporal and morphological information of the signal, which is much better than spike detection or feature extraction methods [20].

In this section, we briefly introduce basic concepts in CS theory. First, the sparsity of the signal is an important concept. A sparse signal can be compressed through a sensing matrix. Suppose a vector (or signal) x(x1,x2,,xn)RN and some items of x are zero or close to zero, so this vector can be called a sparse vector (or signal). If x is not sparse in the current basis, but it is sparse under some bases, then it still can be regarded as a sparse signal. For example, suppose a basis ΨN×T, in which x=Ψz can be sparsely represented, so x is sparse under basis Ψ.

If x(x1,x2,,xn)RN is sparse, then it can be compressed through a sensing matrix ΦN×M to yRM. When the sparsity of the signal is large, x can be largely compressed, that is, MN, which can be described as in (1).y=ΦN×Mx If x is sparse under basis Ψ, then (1) can change to (2).y=ΦΨz

Second, the original signal can be reconstructed by 1 minimization. Given the original sparse signals and the measurement y, the best way to reconstruct the signal is through 0 minimization [19]. But finding a solution that approximates 0 minimization is NP (non-deterministic polynomial-time) hard; therefore, 1 minimization is widely used in signal reconstruction for CS application [19]. The form of 1 minimization is shown in (3). Based on the signal reconstruction via 1 minimization, many signal reconstruction algorithms exist. 1 minimization reconstruction algorithms, which directly use framework shown in (3), are powerful methods for computing sparse representations [21]; basis pursuit algorithms (BP) belong to this category [22]. Greedy algorithms are another category, which includes match pursuit algorithm (MP), orthogonal matching pursuit algorithm (OMP) [23], and iterative hard or soft thresholding algorithm [24], [25]. Greedy algorithms are computationally efficient, but they are usually sensitive to noise especially when the original signals are not exactly sparse. By comparison, 1 minimization reconstruction algorithms are more robust to noise but at the price of a higher computational cost [26]. In addition, other kinds of algorithms can be used to reconstruct the original signals; for example, a Bayesian-based reconstruction method, called Block Sparse Bayesian Learning (BSBL) algorithm, uses the maximum likelihood to reconstruct the signal, and can reconstruct non-sparse signals [27].x=argminzz1subject tozB(y) where B(y)={z:Az=y}.

Third, the design of the sensing matrix is another important topic. The sensing matrix strongly influences the amount of reconstruction error and also transmission of compressed signals [28]. In CS theory, the sensing matrix Φ can be a random matrix, such as a sub-Gaussian matrix [29], a random discrete Fourier transmission matrix [30], or a deterministic matrix, such as the Discrete Chirp matrix [31], the Reed Muller matrix [32], low-density parity-check (LDPC) matrix [33]. To correctly reconstruct x, the sensing matrix ΦN×M should obey the Restricted Isometry Property, which is described as follows.

Restricted Isometry Property An M×N sensing matrix Φ is said to satisfy an Restricted Isometry Property (RIP) of k order, if it satisfies (4),(1εk)X22ΦX22(1+εk)X22 for all the k-sparse vectors X. The restricted isometry constant εk of matrix Φ lies between 0 and 1. The process of CS compression is shown in Fig. 2. In this diagram, a sparse signal is firstly compressed by a sensing matrix. Then the signal is recovered through the 1 norm-based reconstruction. After the reconstruction, if x is sparse under the basis Ψ, it still needs to recover the signal in the current basis.

Finally, the research in the field of compressed sensing is not just in the theoretical concept but also in the design of underlying circuitry. There are several articles about the application of the CS technique [34], [35], [36]. Also, some designers used the CS technique to design the neural recording circuit [10], [20], [37]. Fig. 3 shows the principles of use of the CS technique in neural recording circuit design. Figs. 3(a) and 3(b) depict analog and digital single-channel designs that apply the CS technique. The designs have two common parts: a sensing matrix generator and a multiplication block. In Fig. 3, the sensing matrix generator could be a random or deterministic matrix (vector) generator, but most current designs use a random sensing matrix to design the circuit. The multiplication block does the matrix multiplication of the sensing matrix and the signal vector.

In a recent article, we introduced a sensing matrix construction method called a minimum Euclidean or Manhattan distance cluster-based deterministic (MDC) sensing matrix [38]. In this article, we proved that neural signals were not sparse, but contained many identical (or similar) points. We researched these identical or highly similar non-zero points, i.e., the similarity of the points in a signal, to compress neural signals, and we proposed the MDC matrix. From the simulation results, we proved that neural signals can be largely compressed with unit MDC (UMDC) matrix and also can be well reconstructed by basis pursuit algorithm for sparse signals or non-sparse signals which contain lots of similar points. In addition, we proved that the MDC matrix obeys the RIP under two prerequisites, and we concluded that the MDC matrix can compress a signal with a relatively large compression rate (CR) and small reconstruction error rate (RER).

In this article, our contribution is using the MDC matrix to implement single and multichannel digital systems. It can be seen from Fig. 3 that the process of sensing matrix generation does not include any information from the signals that need to be compressed, but the MDC matrix can use the information of the signal. According to [38], we design a digital signal processing system which applies the MDC matrix; the principle of the circuit is shown in Fig. 3(c). The difference between our design and the ones in Figs. 3(a) and 3(b) is that our design uses the information of the signal itself to generate the sensing matrix. In later sections, we give details of construction of a digital circuit using the MDC matrix and discuss how to use the MDC matrix to design a multichannel signal processing system.

In the remaining parts of this paper, we briefly reiterate some concepts of the MDC sensing matrix for the construction of the sensing matrix in section 2. We introduce the simulation dataset in section 3. The circuit design and implementation are introduced in section 4. The simulation results and the discussion based on the design of the signal processing system are given in section 5. Finally, in section 6, we present our conclusions.

Section snippets

The construction of the MDC matrix

In this section, we briefly review concepts relating to the MDC matrix. The definitions of a p-dissimilar vector and the construction method of an MDC matrix, which are also discussed in [38], are given as follows.

Definition 1 Equal Index Permutation

Suppose for a vector X(x1,x2,,xn), there exists a permutation A1(a1,a2,,at) of the index vector (1,2,,n), and a vector based on this index permutation XA1(xa1,xa2,,xat). If every two items from XA1 are identical under some measures, specifically, xai=xaj, xai, xajXA1, A1 is

Materials and methods

All the algorithms, methods and data analysis procedures were implemented in MATLAB (Mathworks, Natick, MA). The circuit was described in Modelsim (Mentor Graphics, Wilsonville, OR) and the post-layout of the circuit was designed in Cadence Encounter (Cadence Design Systems, San Jose, CA). The power consumption and silicon area of the circuit were estimated by Synopsys (Synopsys, Mountain View, CA). We used three datasets to make the simulation.

The first dataset was acquired from the prefrontal

Circuit design and implementation

In this section, we describe the design of a CS-based digital signal processing circuit. A top-level view of the design is initially introduced, then the design of a spike detection block is reported, followed by the design of the data compression block using the MDC matrix, and the design of a multichannel system is detailed.

Results and discussion

In this section, main parameters related to both single-channel and multichannel designs are highlighted. Then, the results of multichannel simulation and the specific post-layout circuit are discussed. Finally, the achieved design is compared to similar work in the literature.

Conclusion

In this article, we put forward a multichannel digital neural signal processing system using an MDC matrix. We introduced the construction of the MDC matrix and we discussed the construction of a single-channel signal processing system. The single-channel system includes two building blocks: the spike detection block and the data compression block. We chose the RMS method to detect the spikes and applied the MDC matrix to compress neural signals. When using the MDC matrix to compress the

Acknowledgements

The authors acknowledge financial support from the Natural Sciences and Engineering Research Council of Canada (RGPIN-2012-121928 CRSNG), the Canadian Research Chair on Smart Medical Devices (#950-204302), and the China Scholarship Council. Thanks are due to Professor J.C. Martinez-Trujillo from McGill University for his input to this paper.

Nan Li received the B.Sc. degree in Computer science and technique from the National University of Defense Technology, Changsha, China, in June 2008. He received the M.Sc. degree from the National University of Defense Technology, Changsha, China, in 2011. From March 2011, he continued his research in the National University of Defense Technology as a Ph.D. student until August 2011, when he joined the Electrical Engineering Department at the Polytechnique of Montreal to pursue the PhD degree.

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    Nan Li received the B.Sc. degree in Computer science and technique from the National University of Defense Technology, Changsha, China, in June 2008. He received the M.Sc. degree from the National University of Defense Technology, Changsha, China, in 2011. From March 2011, he continued his research in the National University of Defense Technology as a Ph.D. student until August 2011, when he joined the Electrical Engineering Department at the Polytechnique of Montreal to pursue the PhD degree. His research interests are biomedical signal processing, compressed sensing technology, low power consumption device design and neural recoding system design for biomedical applications.

    Morgan Osborn is pursuing his B.Sc. degree in Computer Science at the University of Illinois at Chicago, and is currently an undergraduate research intern with Polytechnique Montreal's Electrical Engineering Department. His research focus is the development of algorithms for signal processing applications.

    Guoxing Wang (M'06, SM'13) received the PhD degree in electrical engineering from the University of California at Santa Cruz, US, in 2006. He holds an Associate Professorship in School of Microelectronics, Shanghai Jiao Tong University, Shanghai, China. Dr. Wang is a senior member of IEEE, and a member of the IEEE Biomedical Circuits Systems Technical Committee (BioCAS). He serves as an Associate Editor for IEEE Transactions on Circuits and Systems II, Guest Editor for IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) and Guest Editor for IEEE Transactions on Biomedical Circuits and Systems.

    Mohamad Sawan (S'88–M'89–SM'96–F'04) received the PhD degree in electrical engineering from Sherbrooke University, Canada, in 1990. He is currently a Professor of microelectronics and biomedical engineering in Polytechnique Montreal. His interests are the design and test of analog, digital, RF, MEMS and optic circuits and Microsystems. Dr. Sawan is a holder of a Canada Research Chair in Smart Medical Devices, and is leading the Microsystems Strategic Alliance of Quebec (ReSMiQ). He is a Fellow of the IEEE, Fellow of the Canadian Academy of Engineering, Fellow of the Engineering Institute of Canada, and Officer of the National Order of the Quebec.

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