Symbolic Model Checking for Channel-based Component Connectors

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Abstract

The paper reports on the foundations and experimental results with a model checker for component connectors modelled by networks of channels in the calculus Reo. The specification formalisms is a branching time logic that allows to reason about the coordination principles of and the data flow in the network. The underlying model checking algorithm relies on variants of standard automata-based approaches and model checking for CTL-like logics. The implementation uses a symbolic representation of the network and the enabled I/O-operations by means of binary decision diagrams. It has been applied to a couple examples that illustrate the efficiency of our model checker.

Keywords

constraint automata
model checking
branching time logic
data streams
binary decision diagrams

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The authors are supported by the DFG-NWO-projects SYANCO and VOSS II.