Engineering of An Assertion-based PSLSimple-Verilog Dynamic Verifier by Alternating Automata
Under a Creative Commons license
open access
Keywords
Assertion-based Verification
Automata Construction
Property Specification Language
Cited by (0)
- 1
This paper is supported by the “Dengshan Project”(067062017) of the Science and Technology Commission of Shanghai Municipality.
Copyright © 2008 Elsevier B.V.