Editorial
Recent developments in high performance computing and security: An editorial

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Introduction

In recent years, high performance computing has received new life, on one hand, by recent developments in parallel and distributed architectures (e.g., multicore processors, grid and cloud computing, service-oriented architectures, etc.) and, on the other hand, by new applications coming from science & technology, the business world, entertainment, and so on. This trend is projected to continue for the foreseeable future.

At the same time, people are becoming more and more concerned about security, and for well-established reasons. Indeed, the more connected computing resources are, the more vulnerable they turn out to be. As a consequence, the capability of recognizing security threats and preparing appropriate prevention, detection, and response tools are becoming increasingly important issues.

As a consequence, it is inevitable for high performance computing and security to come together and jointly address several issues and challenges. This special issue attempts to present some of the most recent trends and developments in this overlapping area from three different perspectives: high performance computing for security, security of high performance computing systems, and trade-offs between high performance and security.

This editorial is organized as follows. After brief descriptions of the main factors according to which high performance computing and security can be classified (Sections 2 High performance computing, 3 Security, respectively), an overview of three categories for HPC and security that we identify is presented in Sections 4 HPC for security, 5 Security of HPC systems, 6 Tradeoffs between high performance and security. The works selected for this special issue are then organized and summarized according to the aforementioned three perspectives (Section 7).

Section snippets

High performance computing

In a broad sense, high-performance computing is a research area dealing with the solution of computationally intensive problems by means of parallel architectures and parallel programming.

Security

Talking about computer and network security means establishing what the security requirements are, what the security vulnerabilities, threats or attacks are, and what the security defenses are (e.g., see [3]).

HPC for security

The first perspective we offer stipulates that security solutions and tools often require a large amount of computational resources and where a large amount of data must be processed and analyzed in a short time. Therefore, it is natural to think of high-performance computing systems for providing the required computational power.

When reviewing the related work based on the classifications in Section 3.3, it is interesting to observe that most of the computationally intensive problems arise

Security of HPC systems

Like any computing environment, HPC systems require being secured. This second perspective presumes that high performance computing often involves resources that are shared among multiple users. As a consequence, security concerns arise. On the other hand, security for high performance computing is a challenging issue. HPC architectures can be characterized as complex systems with their own peculiarities that distinguish them from traditional ones. As reported by Armbrust et al. [56], security

Tradeoffs between high performance and security

The third perspective surmises that performance and security are often conflicting requirements. Therefore, a compromise between maintaining high performance and achieving robust security is needed. There are several security trade-off analysis methodologies that have been proposed. They do not specifically deal with high-performance computing systems, but they can be used, and indeed they have been, for them as well. Such analyses are usually conducted at design-time. For instance, Bass et al.

Papers in this special issue

The initial submission included 41 paper proposals. From this group, 24 papers were considered and went through three rigorous review cycles. The final count is the 9 papers that we present here.

Papers submitted to and published in this special issue reflect the trends reported above. Here is a brief introduction to the papers included.

Acknowledgments

The guest editors of this special issue wish to express their deep gratitude to all authors, external reviewers, and Peter Sloot and the Elsevier staff for their efforts in making this issue possible.

External Reviewers: Ashiq Anjum, Liz Bacon, Antun Balaz, Francesco Antonio Buccafurri, Massimo Cafaro, Rodrigo N. Calheiros, Bin Cao, Gianluca Capuzzi, Eduardo Cesar, Uei Ren Chen, Franco Chiaraluce, Alfredo Cuzzocrea, Filip De Turck, Pavlos Delias, Luciano Antonio Digiampietri, Ioanna Dionysiou,

Waleed W. Smari is a Senior Research Scientist at Ball Aerospace & Technologies Corp. and a professor of Electrical and Computer Engineering. His technical interests and specialties include High Performance Parallel and Distributed Processing and Networking, Performance Evaluation Methods and Modeling Techniques of Computing Systems, Reconfigurable Computing and Digital Systems Design, and Computer Engineering Education. He has served as PI on several research projects sponsored by government

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  • Cited by (2)

    Waleed W. Smari is a Senior Research Scientist at Ball Aerospace & Technologies Corp. and a professor of Electrical and Computer Engineering. His technical interests and specialties include High Performance Parallel and Distributed Processing and Networking, Performance Evaluation Methods and Modeling Techniques of Computing Systems, Reconfigurable Computing and Digital Systems Design, and Computer Engineering Education. He has served as PI on several research projects sponsored by government agencies and industry. He was a Visiting Fellow at government labs as well as at a number of universities around the World. He has been a Senior Member of the Institute of Electrical and Electronics Engineers (IEEE) and the Association for Computing Machinery (ACM), a Member of the American Society for Engineering Education (ASEE), the International Society of Computers and Their Applications (ISCA), the International Association of Science and Technology for Development (IASTED), The Society for Computer Simulation International (SCS), and The European Council on Modelling and Simulation (ECMS).

    Luca Spalazzi is Associate Professor at the Università Politecnica delle Marche, Italy.

    He received the M.S. in Electronic Engineering and the Ph.D. in Artificial Intelligent Systems from the University of Ancona, Italy in 1989 and 1994, respectively.

    He has worked as a consultant at the Istituto di Ricerca Scientifica e Tecnologica (IRST), Trento, Italy (1991–1997). He was a visiting scholar at the Australian Artificial Intelligence Institute (AAII), Carlton, Vic., Australia and at the Computer Science Department, Stanford University, California in 1992 and 1996, respectively. His research has been supported by grants from the European Union and the Italian Minister of University and Scientific Research.

    His present research areas include Formal Methods and Model Checking applied to Semantic Web Services, Computer and Network Security (in cooperation with Italian State Police), and Multi-agent Systems.

    Yacine Zemali is an Associate Professor at the Bourges National Graduate School of Engineering, France (ENSI Bourges) and a researcher at the Fundamental Computer Science Laboratory of Orléans (LIFO) in the Security and Distributed Systems (SDS) research group. His main research interests are Web Security, Intrusion Detection and more generally the use of Artificial Intelligence tools for security. He has formerly been R&D engineer in the field of Web Security at art of defence GmbH (now Riverbed Technology GmbH - Stingray Business Unit).

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