Lifetime-aware real-time task scheduling on fault-tolerant mixed-criticality embedded systems

Highlights

• Conduct the first study on maximizing the lifetime of fault-tolerant mixed-criticality embedded systems.

• Consider both transient faults and thermal cycling incurred permanent faults.

• Present a mixed-integer linear programming (MILP) formulation.

• Propose a novel time-efficient heuristic.

• Carried out experiments on both real-world and synthetic benchmarks.

Abstract

In recent years, the design of mixed-criticality embedded systems suffering from transient faults has attracted much attention. From the perspective of system users, it is desirable to optimize system lifetime while meeting all design constraints. Existing task scheduling algorithms cannot be utilized to maximize the lifetime of mixed-criticality embedded systems since they do not take into account the impact of providing transient fault tolerance on system lifetime. This paper investigates the problem of prolonging the lifetime of mixed-criticality embedded systems on a uniprocessor equipped with dynamic voltage and frequency scaling (DVFS) technique. The transient faults and thermal cycling incurred permanent faults are simultaneously considered in the system lifetime optimization under the constraints of safety requirements and schedule timeliness. A mixed-integer linear programming (MILP) formulation is first presented to deal with the task scheduling problem. Since the MILP method is a time-consuming solution for large-scale systems, a cross-entropy method based heuristic is then proposed to achieve a better tradeoff between the system lifetime achieved by the derived task schedule and the runtime consumed to generate the task schedule. Experiments based on synthetic and real-world benchmarks are conducted, and simulation results demonstrate that the proposed heuristic improves system lifetime by up to 32.73% with acceptable runtime as compared to benchmarking methods.

Introduction

In many safety-related fields such as avionics and automotive industries, tasks of different importance (i.e., criticality levels) usually co-exist [1], [2]. For example, the two tasks of music playing and flight control in the flight management systems are obviously with unequal criticality levels and distinct degrees of assurance. However, traditional embedded systems only allow the existence of tasks with a same criticality level, which indicates that the tasks with different criticality levels need to run on multiple separate hardware platforms. As a result, the cost, weight, and power consumption of these hardware platforms will significantly increase or even become unaffordable as the total number of task criticality levels increases. A promising trend in the design of nowadays advanced embedded systems is to integrate multiple functionalities (i.e., tasks) with no less than two criticality levels onto a common and shared computing platform. These emerging embedded systems that permit the co-existence of different task criticality levels are called mixed-criticality (MC) embedded systems [3], [4]. In an MC embedded system, tasks having higher importance should be provided higher criticality levels for the purpose of guaranteeing the safety requirements of these tasks.

In the past few years, there has been a widespread interest in the investigation of MC embedded systems. However, as detailed in [4], most of the existing techniques (e.g., mechanisms in [5], [6], [7], [8], [9]) dedicated for MC embedded systems cannot guarantee a dependable system operation because they fail to take fault-tolerance as a design constraint. As the susceptibility of modern processors to soft errors is dramatically increasing with the relentless scaling of feature size and operating voltage [10], [11], fault-tolerance management is deemed to be a significant and pressing research issue in MC embedded systems. Recently, several research works [12], [13], [14], [15], [16] have devoted to the design of fault-tolerant MC embedded systems. Unfortunately, these existing task scheduling algorithms only consider tolerating transient faults while neglecting tolerance for permanent faults. Directly adopting such algorithms will inevitably accelerate processor wearouts that eventually result in permanent faults occurring earlier and system lifetime decaying drastically. From the perspective of system users, it is desirable to prolong the lifetime of MC embedded systems able to handle both permanent faults and transient faults. However, to the best of our knowledge, there are no works on investigating the lifetime optimization of MC embedded systems that can deal with permanent and transient faults simultaneously.

In this paper, we conduct the first study of prolonging the lifetime of MC embedded systems on a uniprocessor equipped with dynamic voltage and frequency scaling (DVFS) technique. We take into account both transient faults and thermal cycling incurred permanent faults in the system lifetime optimization under the constraints of safety requirements and schedule timeliness. By judiciously determining (1) the task operating frequency, (2) the task re-execution number, and (3) the task execution order, our proposed solution can generate a lifetime-optimum task schedule while satisfying all design requirements. The main contributions of this paper are summarized below.

• We present a mixed-integer linear programming (MILP) formulation to schedule independent real-time tasks for maximizing the lifetime of uniprocessor MC embedded systems.

• We propose a time-efficient solution developed on thecross-entropy method (CEM) to the formulated scheduling problem.

• Experimental results based on synthetic and real-life benchmarks demonstrate that the developed approach prolongs system lifetime by up to 32.73%.

The remainder of the paper is organized as follows. Section 2 surveys the related works on MC embedded systems. We briefly introduce the system architecture and models in Section 3. In Section 4, we describe the problem definition and give an overview of our developed algorithms. Section 5 presents an MILP formulation for the studied task scheduling problem while Section 6 shows the developed CEM-based heuristic. Section 7 numerically investigates the performance achieved by the proposed scheme and Section 8 gives concluding remarks.