Modelling and performance study of finite-buffered blocking multistage interconnection networks supporting natively 2-class priority routing traffic

Abstract

In this paper, we model, analyze and evaluate the performance of a 2-class priority architecture for finite-buffered multistage interconnection networks (MINs). The MIN operation modelling is based on a state diagram, which includes the possible MIN states, transitions and conditions under which each transition occurs. Equations expressing state and transition probabilities are subsequently given, providing a formal model for evaluating the MIN's performance. The proposed architecture's performance is subsequently analyzed using simulations; operational parameters, including buffer length, MIN size, offered load and ratios of high priority packets which are varied across experiments to gain insight on how each parameter affects the overall MIN performance. The 2-class priority MIN performance is compared against the performance of single priority MINs, detailing the performance gains and losses for packets of different priorities. Performance is assessed by means of the two most commonly used factors, namely packet throughput and packet delay, while a performance indicator combining both individual factors is introduced, computed and discussed. The findings of this study can be used by network and interconnection system designers in order to deliver efficient systems while minimizing the overall cost. The performance evaluation model can also be applied to other network types, providing the necessary data for network designers to select optimal values for network operation parameters.

Introduction

Multistage interconnection networks (MINs) with crossbar switching elements (SEs) are often used in the context of multiprocessor computer architecture for the interconnection of processors and memory modules (Chang-hoon and Sung-chun, 1997), (Josep and Zheng, 1997). MINs are also increasingly adopted for implementing the switching fabric of high-capacity communication processors, including ATM switches, gigabit Ethernet switches and terabit routers (Atiquzzaman and Chen, 1999, Elizabeth and Hing, 2004, Saleh and Atiquzzaman, 2000, Saleh and Atiquzzaman, 2001, Zhou and Atiquzzaman., 2002). MINs owe their popularity both to operational features they deliver, such as the ability to route multiple communication tasks concurrently, and to the low cost/performance ratio they achieve. The family of multistage interconnection networks includes several major categories, such as Omega, Generalized Cube, Benes, Batcher Banyan etc; of these, MINs with the Banyan (Goke and Lipovski, 1973) property are more widely adopted, since non-Banyan MINs are, in general, more expensive than Banyan ones and more complex to control.

The performance of the communication infrastructure that interconnects the system's elements (nodes, processors, memory modules etc.) has been recognized as a critical factor for overall system performance, both in the context of parallel and in the context of distributed systems. As a result, much research has been conducted, targeting to identify the factors that affect the communication infrastructure's performance and provide models for performance prediction and evaluation. Two major directions have been taken to this end: the first employs analytical models based either on Markov models or on Petri-nets, while the second uses simulation techniques. These works enable network designers to estimate network performance before it is actually implemented, allowing thus network design tuning and adjustment of parameters. Using the insights from this procedure, network designers may craft efficient systems, tailored to the specific requirements of the system under implementation with a minimal cost, since the actual implementation decisions are deferred until all operational parameters have been determined.

In this paper we propose a novel approach to model the operational behaviour of a 2-priority class MIN, which takes into account the previous and the current state of both queues (high and low priority) of each switching element, leading thus to more accurate results. The modelling scheme is complemented with equations expressing the probability for each state transition, giving a complete analytic framework for 2-class priority MIN performance behaviour. Simulation experiments are also conducted to estimate the MIN performance under various traffic loads, buffer lengths, high/low priority traffic ratios and MIN sizes (number of stages). The findings of this paper can be used by network designers to gain insight on the impact of each MIN design parameter on the overall MIN performance and to select the optimal MIN configuration for the needs of their environment.

The remainder of this paper is organized as follows: Section 2 overviews related work in the area of network performance evaluation and priority schemes, while in Section 3 we present the proposed 2-class priority scheme, we describe its operation and give its analytical system of equations. Thus, a novel 5-state and 6-state buffer model for high and low priority queues, respectively is employed. Subsequently, in Section 4 we present the performance criteria and parameters related to the network. Section 5 presents and discusses the results of our performance analysis, which has been conducted through simulation experiments, while Section 6 provides the concluding remarks and outlines future work.